SD1200 Datasheet, PDF (27/35 Pages) List of Unclassifed Manufacturers – Analog-Interface XGA/SXGA TFT LCD Display Controller

SmartASIC, Inc.
SD1200
PRELIMINARY DATA SHEET
Scale factor NO
8
140H Scale factor used when generate look up table for next
odd pixel multiplication
Offset factor CE
8
141H Offset factor used when generate look up table for
current even pixel multiplication
Offset factor CO
8
142H Offset factor used when generate look up table for
current odd pixel multiplication
Offset factor NE
8
143H Offset factor used when generate look up table for
next even pixel multiplication
Offset factor NO
8
144H Offset factor used when generate look up table for
next odd pixel multiplication
Scale factor V
8
145H Scale factor used when generate look up table for line
multiplication
Offset factor V
8
146H Offset factor used when generate look up table for line
multiplication
Minimum pixels per 11 147H-148H Minimum number of pixels per line for LCD panel
line for LCD
LCD polarity
4
149H[3:0] Controls the polarity of output VSYNC, HSYNC,
clock and display enable
Check sum
Bit0: 0: clock active high, 1: clock active low
Bit1: 0: HSYNC active low, 1: HSYNC active high
Bit2: 0: VSYNC active low, 1: VSYNC active high
Bit4: 0: de active high, 1: de active low
8
14AH Sum of all part 9 bytes (keep only lower 8 bit)
Part 10: Horizontal Interpolation Lookup Table
Symbol
Mapped value
Check Sum
Width
(bits)
8
8
Address
Description
1C0H-2BFH This is the base table for all four horizontal
interpolation lookup tables. Each table is then
generated by multiply this value with corresponding
scale factor and added with corresponding offset
factor.
2C0H Sum of all part 10 entry (only keep lower 8 bits)
Part 11: Vertical Interpolation Lookup Table
Symbol
Mapped value
Check Sum
Width
(bits)
8
8
Address
Description
2E0H-3DFH This is the base table for vertical interpolation lookup
table. The vertical interpolation table is then
generated by multiply this value with vertical scale
factor and added with vertical offset factor.
3E0H Sum of all part 10 entry (only keep lower 8 bits)
September, 1998
SmartASIC Confidential
27