AC1040F Datasheet, PDF (23/37 Pages) List of Unclassifed Manufacturers – Ultra Low Power 10/100 Quad RMII Ethernet Transceiver

AC104QF
Ultra Low Power 10/100 Quad RMII Ethernet Transceiver
Register 16: BT and Interrupt Level Control Register
Reg.bit
16.15
16.14
Name
Reserved
INTR_LEVL
16.13 TXJAM
16.12
16.11
Reserved
SQE Test Inhibit
16.[10:6]
16.5
16.4
Reserved
Auto Polarity
Disable
Reverse Polarity
16.[3:0] Reserved
Description
1=INTR pin will be active high.
0=INTR pin will be active low.
1 = Force CIM to send JAM pattern
0 = Normal operation
1 = Disable 10BaseT SQE testing.
0 = Enable 10BaseT SQE testing, which will generate a
COL pulse following the completion of a packet
transmission.
1 = Disable Auto Polarity detection/correction.
0 = Enable Auto Polarity detection/correction.
1= Reverse Polarity when Reg. 16.5 = 0
0= Normal Polarity when Reg. 16.5 = 0
If Reg. 16.5 is set to 1, writing a one to this bit will
reverse the polarity of the transmitter.
Mode
RW
RW
RW
RO
RW
RO
RW
RW
RO
Default
0
0
0
0
0
0
0
0
0
Register 17: Interrupt Control/Status Register
Reg.bit
17.15
17.14
17.13
17.12
17.11
17.10
17.9
17.8
17.7
17.6
17.5
17.4
17.3
17.2
17.1
17.0
Name
Jabber_IE
Rx_Er_IE
Page_Rx_IE
PD_Fault_IE
LP_Ack_IE
Link_Not_OK_IE
R_Fault_IE
ANeg_Comp_IE
Jabber_Int
Rx_Er_Int
Page_Rx_Int
PD_Fault_Int
LP_Ack_Int
Link_Not_OK Int
R_Fault_Int
ANeg _Comp Int
Description
Jabber Interrupt Enable.
Receive Error Interrupt Enable.
Page Received Interrupt Enable.
Parallel Detection Fault Interrupt Enable.
Link Partner Acknowledge Interrupt Enable.
Link Status Not OK Interrupt Enable.
Remote Fault Interrupt Enable.
Auto-Negotiation Complete Interrupt Enable.
This bit is set when a jabber event is detected.
This bit is set when RX_ER transitions high.
This bit is set when a new page is received during
ANeg.
This bit is set when parallel detect fault is detected.
This bit is set when the FLP with acknowledge bit
set is received.
This bit is set when link status switches from OK
status to Non-OK status (Fail or Ready).
This bit is set when remote fault is detected.
This bit is set when ANeg is complete.
Mode
RW
RW
RW
RW
RW
RW
RW
RW
RC
RC
RC
RC
RC
RC
RC
RC
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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Document Revision 4.0
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