GS820E32T Datasheet, PDF (15/23 Pages) List of Unclassifed Manufacturers – 2M Synchronous Burst SRAM

Flow Through Read Cycle Timing
GS820E32T/Q-150/138/133/117/100/66
CK
ADSP
ADSC
ADV
A0-An
GW
BW
Single Read
tS tH
tKH
Burst Read
tKL
tKC ^{ADSP is blocked by E1 inactive}
tS tH
ADSC initiated read
tS tH
Suspend Burst
Suspend Burst
tS tH
RD1
tS
RD2
RD3
tH
tS
tH
BA - BD
E1
E2
E3
G
DQA-DQD
tS tH
E1 masks ADSP
tS tH
tS _tH
E2 and E3 only sampled with ADSP or ADSC
tOE ^tOHZ
tOLZ
tKQX
Hi-Z
Q1A
Q2A
Q2B
Q2C
Q2D
tLZ
tKQ
Deselected with E2
tKQX
Q3A
tHZ
Rev: 1.03 2/2000
15/23
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, Giga Semiconductor, Inc.
D