88E1111 Datasheet, PDF (133/252 Pages) List of Unclassifed Manufacturers – Integrated 10/100/1000 Ultra Gigabit Ethernet Transceiver

Register Description
Table 58: Status Register - Fiber (Continued)
Page 1, Register 1
Bits
2
1
0
Field
Fiber Link Sta-
tus
Reserved
Extended
Capability
Mode
RO,LL
RO
HW
Rst
0x0
Always
1
SW
Rst
0x0
Always
1
Description
This register bit indicates when link was lost since the
last read. For the current link status, either read this reg-
ister back-to-back or read Register 17_1.10 Link Real
Time.
1 = Link is up
0 = Link is down
This bit must be read and left unchanged when perform-
ing a write.
1 = Extended register capabilities
Table 59: PHY Identifier
Page Any, Register 2
Bits Field
15:0 Organization-
ally Unique
Identifier Bits
3:18
Mode
RO
HW
Rst
0x0141
SW
Rst
0x0141
Description
Marvell^® OUI is 0x005043
0000 0000 0101 0000 0100 0011
^
^
bit 1..............................................bit 24
Register 2.[15:0] show bits 3 to 18 of the OUI.
0000000101000001
^
^
bit 3...........................bit18
Copyright © 2004 Marvell
November 19, 2004, Advance
CONFIDENTIAL
Document Classification: Proprietary Information
Doc. No. MV-S100649-00, Rev. E
Page 133