M12S128324A Datasheet, PDF (45/46 Pages) Elite Semiconductor Memory Technology Inc. – 1M x 32 Bit x 4 Banks Synchronous DRAM

ESMT
Revision History
Revision
1.0
1.1
1.2
1.3
1.4
Date
2008.07.07
2008.07.16
2008.07.16
2008.08.07
2009.03.27
M12S128324A
Description
Original
1. Modify ICC3N
2. Modify the figure of DC output load circuit
Modify ICC4 and ICC5
Modify ICC4 and ICC5 for -7
1. Modify the description about self refresh operation
2. Correct type error
Elite Semiconductor Memory Technology Inc.
Publication Date: Mar. 2009
Revision: 1.4
45/46