M13S128168A-2N Datasheet, PDF (2/49 Pages) Elite Semiconductor Memory Technology Inc. – Double-data-rate architecture, two data transfers per clock cycle

ESMT
Ordering Information
Product ID
Max Freq.
Automotive range (V): -40℃ to +85℃
M13S128168A -4TVG2N
250MHz (DDR500)
M13S128168A -5TVG2N
200MHz (DDR400)
M13S128168A -6TVG2N
166MHz (DDR333)
M13S128168A -4BVG2N
250MHz (DDR500)
M13S128168A -5BVG2N
200MHz (DDR400)
M13S128168A -6BVG2N
166MHz (DDR333)
Automotive range (VA): -40℃ to +105℃
M13S128168A -4TVAG2N
M13S128168A -5TVAG2N
M13S128168A -6TVAG2N
M13S128168A -4BVAG2N
M13S128168A -5BVAG2N
M13S128168A -6BVAG2N
250MHz (DDR500)
200MHz (DDR400)
166MHz (DDR333)
250MHz (DDR500)
200MHz (DDR400)
166MHz (DDR333)
M13S128168A (2N)
Automotive Grade
Package
Comments
66 pin TSOPII
60 Ball BGA
Pb-free
66 pin TSOPII
60 Ball BGA
Pb-free
Functional Block Diagram
CLK
CLK
CKE
Clock
Generator
Address, BA
Mode Register &
Extended Mode
Register
Row
Address
Buffer
&
Refresh
Counter
CS
RAS
CAS
WE
Column
Address
Buffer
&
Refresh
Counter
Bank D
Bank C
Bank B
Bank A
Sense Amplifier
Column Decoder
Data Control Circuit
DQS ^DM
DQ
Elite Semiconductor Memory Technology Inc.
CLK, CLK
DLL
Publication Date : Mar. 2013
Revision : 1.1
2/49