S1D13706 Datasheet, PDF (87/152 Pages) Epson Company – S1D13706 Embedded Memory LCD Controller

Epson Research and Development
Vancouver Design Center
Page 87
Table 6-31: 320x240 Epson D-TFD Panel Horizontal Timing
Symbol
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
t14
t15
t16
t17
Parameter
FPLINE pulse width
FPLINE falling edge to FPSHIFT start position
FPSHIFT active period
FPSHIFT start to first data
Horizontal display period
Last data to FPSHIFT inactive
FPLINE falling edge to GPIO4 first pulse falling edge
Horizontal total period
GPIO4 first pulse falling edge to second pulse falling edge
GPIO4 pulse width
GPIO1 pulse width
GPIO1 low period
GPIO0 pulse width
GPIO6 low pulse width
GPIO6 rising edge to GPIO0 falling edge
GPIO2 toggle to GPIO3 toggle
GPIO5 low pulse width
Min
Typ
9
8.5
331
6
320
5
1
400
200
11
100
100
200
90
10
1
7
1. Ts = pixel clock period
Max
Units
Ts (note 1)
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Ts
Hardware Functional Specification
Issue Date: 2004/02/09
S1D13706
X31B-A-001-09