S1D13505 Datasheet, PDF (22/565 Pages) Epson Company – S1D13505 Embedded RANMAC LCD/CRT Controller

Epson Research and Development
Vancouver Design Center
Generic
BUS
A[27:21]
CSn#
A[20:0]
D[15:0]
WE0#
WE1#
RD#
WAIT#
BCLK
RESET#
Decoder
.
Power
Management
Oscillator
M/R#
CS#
AB[20:0]
DB[15:0]
WE0#
WE1#
RD#
RD/WR#
WAIT#
BUSCLK
RESET#
FPDAT[15:8]
FPDAT[7:0]
FPSHIFT
S1D13505F00A
FPFRAME
FPLINE
DRDY
LCDPWR
RED,GREEN,BLUE
HRTC
VRTC
IREF
Page 17
UD[7:0]
LD[7:0]
FPSHIFT 4/8/16-bit
LCD
FPFRAME _Display
FPLINE
MOD
CRT
Display
IREF
MIPS
BUS
A[25:21]
CSn#
A[20:0]
D[15:0]
MEMW#
SBHE#
MEMR#
RDY
BCLK
RESET
1Mx16
FPM/EDO-DRAM
Figure 3-5: Typical System Diagram (Generic Bus)
.
Power
Management
Oscillator
Decoder
M/R#
CS#
AB[20:0]
DB[15:0]
VDD
WE0#
WE1#
RD#
RD/WR#
WAIT#
BUSCLK
RESET#
FPDAT[15:8]
FPDAT[7:0]
FPSHIFT
S1D13505F00A
FPFRAME
FPLINE
DRDY
LCDPWR
RED,GREEN,BLUE
HRTC
VRTC
IREF
UD[7:0]
LD[7:0]
FPSHIFT 4/8/16-bit
LCD
FPFRAME _Display
FPLINE
MOD
CRT
Display
IREF
1Mx16
FPM/EDO-DRAM
Figure 3-6: Typical System Diagram (NEC VR41xx (MIPS) Bus)
Hardware Functional Specification
Issue Date: 01/02/02
S1D13505
X23A-A-001-14