S1L30000 Datasheet, PDF (105/131 Pages) Epson Company – GATE ARRAY

Input pin
V1
Chapter 10: Pin Layout Considerations
VDD
L1
VDD (internal)
L3 ^{Output pin}
VSS (internal)
L2
Figure 10.1 An LSI Equivalent Circuit
b) The equivalent inductance in the output pins causes noises known as “overshoot,”
“undershoot” and “ringing.” This equivalent inductance is marked by L₃ in Figure 10.1.
Because inductance has the property of storing energy, this overshoot, undershoot or
ringing is the result of the output becoming either low or high. When there is a transi-
tion, the overshoot and undershoot is proportional to the size of the current to the rate
of change of the current.
The most effective way to reduce overshoot and undershoot is to use output cells with
relatively small drive current, and there is a tendency for the overshoot and under-
shoot to be reduced when there is a relatively large load capacitance. Because of this,
there is a need for caution when using cells with especially large current driving capa-
bilities.
(3) Isolating Input Pins and Output Pins
Separating the input pin group from the output pin group in the pin layout is an important
technique for reducing the impact of noise.
Because input pins and bi-directional pins in the input state are especially susceptible to
noise, one should avoid mixing these pins with output pins whenever possible, and the
input pin group, the output pin group, and the bi-directional pin group should be separated
from each other by the power supply pins (V_DD, V_SS).
GATE ARRAY S1L30000 SERIES
EPSON
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DESIGN GUIDE