S1D13A05B00B200 Datasheet, PDF (8/184 Pages) EPCOS – LCD/USB Companion Chip

Page 8
2 Features
Epson Research and Development
Vancouver Design Center
2.1 Integrated Frame Buffer
• Embedded 256K byte SRAM display buffer.
2.2 CPU Interface
• Direct support of the following interfaces:
Hitachi SH-4 / SH-3.
Motorola M68xxx (REDCAP2, DragonBall, ColdFire).
Motorola DragonBall SZ Support (66MHz).
Motorola “REDCAP2” - no WAIT# signal.
Generic MPU bus interface with programmable ready (WAIT#).
• “Fixed” low-latency CPU access times.
• Registers are memory-mapped - M/R# input selects between memory and register
address space.
• The complete 256K byte display buffer is directly and contiguously available through
the 18-bit address bus.
2.3 Display Support
• Single-panel, single drive passive displays.
• 4/8-bit monochrome LCD interface.
• 4/8/16-bit color LCD interface.
• Active Matrix TFT interface.
• 9/12/18-bit interface.
• Extended TFT interfaces (Type 2, 3, 4)
• ‘Direct’ support for 18-bit Sharp HR-TFT LCD (or compatible interfaces).
• ‘Direct’ support for the Casio TFT LCD (or compatible interfaces).
S1D13A05
X40A-A-001-07
Revision 7.7
Hardware Functional Specification
Issue Date: 2012/02/27