EPC110 Datasheet, PDF (20/27 Pages) Espros Photonics corp – Fully integrated configurable light barrier driver & receiver

epc110
Parameter Programming
General Description
A description of the hardware interface for programming is given in chapter “ Hardware interface“.
The device is initially not parametrized. In order to operate the light barrier, the micro-controller (or programmer) needs to do the correct
parameter settings for the selected functionality. This step is usually done in the factory of the light barrier manufacturer. After this the micro-
controller can operate the light barrier or it can work in a standalone mode.
To do so, a specific parametrization of the devices must be executed first. The following procedure is an example thereof.
No. Step
Description
1
Set parameters Parameters like POL, TPULSE, MODE, VMODE, INC, DEC, TPER, SENSN, SENSH are stored into the RAM
of the device using the command WRITE. Write them register by register.
2
Check
parameters
The parameters should be checked by reading them back from each device using the READ command.
3
Program
parameters
If all parameters are stored correctly, store the parameters into the non-volatile memory by using the command
PROG. Please refer to chapter Programming Procedure.
4
Final test
To check the programming of the parameters, turn off the power supply and readout all parameters again.
Programming Procedure
Programming the device is a transfer of the data from the RAM to the corresponding ROM register. Each 16-bit register must be transferred
individually. Thus, register 16 is transferred to register 0, register 17 to register 1, register 18 to register 2. All other registers must not be used.
Figure 12 shows the timing of the programming sequence for one register:
VDD
CS
SCK
SI
50μs
400μs
B 1 1 0 R0 R1 R2 R3 R4
PROG
Register
Figure 17: Direct programming procedure
7.5V
3.3V
“PROG” is the PROG command sequence (110). “Register” means the address of the target register (ROM), e.g. 0, 1, 2.
During programming the voltage at pin VDD has to be increased to VPROG (7.5V) and has to be kept stable buffered during the whole
programming cycle. For an example of a hardware design to generate this supply refer to chapter “ Hardware interface“ in the SPI interface
section.
The timing parameters given in Figure 17 have to be obeyed.
Remarks:
• It is possible to program more than one register during a VDD high cycle. Between two PROG commands a delay of 400μs is
needed.
• Each register can be programmed once only (ROM).
• After programming a register, bit no. 0 of this register becomes automatically a one to indicate that the register is programmed
(FUSEBIT).
© 2011 ESPROS Photonics Corporation
20
Characteristics subject to change without notice
Datasheet epc110 - V2.1
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