EPC110 Datasheet, PDF (17/27 Pages) Espros Photonics corp – Fully integrated configurable light barrier driver & receiver

epc110
Signal conditions and sequences:
Operation mode:
CS = 1, SCK =1, BUF1 = tristate (OUT ESCK = 0), LED/SCK toggling by epc110.
Mode transition to SPI:
If LED/SCK = 1: SCK =1, BUF1 = transparent (OUT ESCK = 1), CS = 0.
Parameter/program mode: CS = 0, BUF1 = transparent (OUT ESCK = 1), SCK and LED/SCK toggling by micro-processor.
Mode transition to operation: If LED/SCK =1: BUF1 = tristate (OUT ESCK = 0), CS = 1.
3. Overload-protection of LED and LED driver
Are the LED and LED driver not designed for continuous mode operation, there is a risk of overloading the LED or the LED driver in
case of no decoupling of the LED driver input from the SPI interface as well from the command instructions. The signals on the line
LED/SCK are depending of the status of the SCK signal itself and from the commands polarity of LED pulse POL, pulse length
TPULSE, Mode selection MODE and the status of the line EN.
In the example circuitry this decoupling is done by the signal OUT ESCK, the inverter INV1 and the and-circuit AND1. In case of
switching the buffer BUF1 transparent (OUT ESCK =1) the LED driver signal is set to low.
4. Supply of the programming voltage (VPROG 7.5V) at pin VDD (refer also to chapter “ Programming Procedure“)
To write the data from the volatile RAM section to the non-volatile ROM section a programming voltage has to be connected to the
VDD pin of the epc110 following the timing diagram of Figure 17: Direct programming procedure.
This is done by an overwriting voltage source to the VDD pin in the proposed design. The main supply for he micro-processor and
the epc110, pin VDD33 is done by the 3.3V voltage regulator, the diode D3 and the resistors R3 and R4. Pin VDD of the epc110 is
fed by diode D2. This allows to overwrite the 3.3V operating supply by the higher 7.5V programming voltage. The programming
voltage is produced by the voltage regulator T3, D4 and R6. Switch on/off of the programming voltage will be done by the R7,T4,R5
and T2 and the signal OUT PROG.
Timing Specifications of telegrams
While CS = 0 and serial clock SCK is toggling in bi-directional function data are
– on input SI read in (Command) with the positive edge and
– on output SO read out (Result) with the negative edge of the serial clock.
Means whilst data are sent to the epc110 chip by the micro-controller, in parallel the result of the last (or more generally: of a previous)
command is sent back from the epc110 to the micro-controller according to the SPI protocol. The timing diagram is shown in Figure 14).
CS
SCK
SI
SO
t
1
t
L
t
SU
t
D
1/f
SCK
t
H
t
Hold
t
rfSCK
t
rf
CS
SCK
SI
SO
Device selection
Serial input/output clock – positive edge: data read in; negative edge: data read out
Serial data input
Serial data output
Figure 14: SPI bus timing
Raster 2.5 x 2.5mm
© 2011 ESPROS Photonics Corporation
17
Characteristics subject to change without notice
Datasheet epc110 - V2.1
www.espros.ch