EN25Q64 Datasheet, PDF (60/60 Pages) Eon Silicon Solution Inc. – 64 Megabit Serial Flash Memory with 4Kbyte Uniform Sector

Revisions List
EN25Q64
Revision No Description
Date
A
Initial Release
2009/03/12
1. Update Block and Chip erase time (typ.) parameter on page 1 and 39.
(1). Block erase: from 0.4s to 0.5s
(2). Chip erase: from 15s to 30s
2. Add the Reset-Enable (RETEN), Reset (RST) commands and Software
Reset Flow on page 14, 16 and 17.
3. Add the description of OTP erase command on page 14, page 36.
B
4. Add the SR5 fail bit information in the table 7 Suspend Status Register
Bit Locations on page 21 and 22.
2009/04/28
5. Modify some parameter values in Table 12 on page 39.
(1). Modify RDSR, RDID from 50 to 80MHz
(2). Modify t_CSH CS# High Time (min.) from100ns to 15ns for read and
50ns for program/erase.
(3). Modify t_WS Write Suspend Latency (max.) from 10µs to 20µs.
(4). Add the t_SR Software Reset Latency value (max.).
1. Add Figure 4. Quad SPI Modes on page 11.
2. Update Software Reset Flow on page 17.
3. Add Figure 8.1 Write Enable/Disable Instruction Sequence under EQIO
Mode on page 19.
4. Add Figure 9.1 Read Status Register Instruction Sequence under EQIO
Mode on page 20.
5. Add Figure 10.1 Read Suspend Status Register Instruction Sequence
under EQIO Mode on page 22.
6. Add Figure 11.1 Write Status Register Instruction Sequence under
EQIO Mode on page 24.
7. Add Figure 13.1 Fast Read Instruction Sequence under EQIO Mode on
page 26.
8. Add Figure 16.1. Quad Input / Output Fast Read Instruction Sequence
under EQIO Mode on page 29.
9. Add Figure 17.1 Quad Input/Output Fast Read Enhance Performance
Mode Sequence under EQIO Mode on page 32.
C
10. Add Figure 18.1 Program Instruction Sequence under EQIO Mode on 2009/07/27
page 34.
11. Add Figure 19. Write Suspend Instruction Sequence Diagram on page
34.
12. Add Figure 20. Write Resume Instruction Sequence Diagram on page
35.
13. Figure 20.1 Write Suspend/Resume Instruction Sequence under
EQIO Mode on page 36.
14. Add Figure 22.1 Block/Sector Erase Instruction Sequence under
EQIO Mode on page 38.
15. Add Figure 23.1 Chip Erase Sequence under EQIO Mode on page 40.
16. Add Figure 27.1. Read Manufacturer / Device ID Diagram under EQIO
Add Mode on page 43.
17. Add Figure 28.1. Read Identification (RDID) under EQIO Mode on
page 45.
18. Add Figure 29.1 Enter OTP Mode Sequence under EQIO Mode on
page 46.
D
Add Figure 21. Write Suspend/Resume Flow on page 37
2009/09/01
1. For the standard SPI (single mode), change the speed from 100MHz to
104MHz. For the dual and quad SPI, change the speed from 80MHz
E
to 50MHz.
2. Add the package option of VDFN 8 ( 6 mm x 8 mm).
2009/10/19
3. Modify Table 10. DC Characteristics I_CC1 (Standby) and I_CC2 (Deep
Power-down) Current from 5µA to 20µA on page 49.
This Data Sheet may be revised by subsequent versions
60
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. E, Issue Date: 2009/10/19
www.eonssi.com