EN25Q64 Datasheet, PDF (19/60 Pages) Eon Silicon Solution Inc. – 64 Megabit Serial Flash Memory with 4Kbyte Uniform Sector

EN25Q64
Write Disable (WRDI) (04h)
The Write Disable instruction (Figure 8) resets the Write Enable Latch (WEL) bit in the Status Register
to a 0 or exit from OTP mode to normal mode. The Write Disable instruction is entered by driving Chip
Select (CS#) low, shifting the instruction code “04h” into the DI pin and then driving Chip Select (CS#)
high. Note that the WEL bit is automatically reset after Power-up and upon completion of the Write
Status Register, Page Program, Sector Erase, Block Erase (BE) and Chip Erase instructions.
The instruction sequence is shown in Figure 8.1 while using the Enable Quad I/O (EQIO) (38h) command.
Figure 8. Write Disable Instruction Sequence Diagram
Figure 8.1 Write Enable/Disable Instruction Sequence under EQIO Mode
This Data Sheet may be revised by subsequent versions
19
or modifications due to changes in technical specifications.
©2004 Eon Silicon Solution, Inc.,
Rev. E, Issue Date: 2009/10/19
www.eonssi.com