EN29F002A Datasheet, PDF (6/35 Pages) Eon Silicon Solution Inc. – 2 Megabit (256K x 8-bit) Flash Memory

USER MODE DEFINITIONS
EN29F002A / EN29F002AN
Reset Mode
EN29F002A features a Reset mode that resets the program and erase operation immediately to
read mode. If reset (RESET = L) is executed when program or erase operation were in progress, the
program or erase which was terminated should be repeated since data will be corrupted. This pin is
not available for EN29F002AN.
Standby Mode
The EN29F002A / EN29F002AN has a CMOS-compatible standby mode which reduces the current
to < 1µA (typical). It is placed in CMOS-compatible standby when CE and the RESET pins are at
V_CC ± 0.5 V ( CE pin only, for EN29F002AN). The device also has a TTL-compatible standby mode
which reduces the maximum V_CC current to < 1mA. It is placed in TTL-compatible standby when CE
and RESET pins are at V_IH. Another method of entering standby mode uses only the RESET pin
(n/a for EN29F002AN). When RESET pin is at V_SS ± 0.3V, the device enters CMOS-compatible
standby with current typically reduced to < 1 µA. When RESET pin is at V_IL, the device enters TTL-
compatible standby with current reduced to < 1mA. When in standby modes, the outputs are in a
high-impedance state independent of the OE input.
Read Mode
The EN29F002A / EN29F002AN has two control functions which must be satisfied in order to obtain
data at the outputs. Chip Enable ( CE ) is the power control and should be used for device selection.
Output Enable ( OE ) is the output control and should be used to gate data to the output pins,
provided the device is selected. Read is selected when both CE and OE pins are held at V_IL with
the W E pin held at V_IH. Address access time (t_ACC) is equal to the delay from stable addresses to
valid output data. Assuming that addresses are stable, chip enable access time (t_CE) is equal to the
delay from stable CE to valid data at output pins. Data is available at the outputs after output
enable access time (t_OE) from the falling edge of OE , assuming the CE has been LOW and
addresses have been stable for at least t_ACC - t_OE.
Output Disable Mode
When the CE or OE pin is at a logic high level (V_IH), the output from the EN29F002A /
EN29F002AN is disabled. The output pins are placed in a high impedance state.
Auto Select Identification Mode
The manufacturer and device type can be identified by hardware or software operations. This mode
allows applications or programming equipment automatically matching the device with its
corresponding interface characteristics.
To activate the Auto Select Identification mode, the programming equipment must force 11.0 V ±
0.5V on address line A9 of the EN29F002AT/B. Two identifier bytes can then be sequenced from the
device outputs by toggling address lines A0 and A8 from V_IL to V_IH.
The manufacturer and device identification may also be read via the command register. By following
the command sequence referenced in the Command Definition Table (Table 5). This method is
desirable for in-system identification (using only + 5.0V).
When A0 = A1 = A6 = V_IL and by toggling A8 from V_IL to V_IH, the Manufacturer ID can be read as Eon
= 7F, 1C (hex) to identify EON . When A0 = V_IH, A1 = A6 = V_IL, and by toggling A8 from V_IL to V_IH,
This Data Sheet may be revised by subsequent versions
6
or modifications due to changes in technical specifications.
©2003 Eon Silicon Solution, Inc., www.essi.com.tw
Rev. A, Issue Date: 2003/03/26