EN25S40A Datasheet, PDF (58/68 Pages) Eon Silicon Solution Inc. – 4 Megabit 1.8V Serial Flash Memory with 4Kbyte Uniform Sector

EN25S40A
Table 16. AC Characteristics
(T_a = - 40°C to 85°C; V_CC = 1.65-1.95V)
Symbol Alt
Parameter
Min
Typ
Max
Serial Clock Frequency for:
FAST_READ, PP, SE, HBE, BE, DP, RES,
WREN, WRDI, WRSR, Dual Output Fast Read ,
D.C.
104
F_R
f_C
RDSR
Serial Clock Frequency for:
Read Burst, RDID, Quad I/O Fast Read and
D.C.
104
EQPI.
f_R
Serial Clock Frequency for READ.
D.C.
50
t_CH ¹
Serial Clock High Time
4.5
t_CL1
Serial Clock Low Time
4.5
t_CLCH2
Serial Clock Rise Time (Slew Rate)
0.1
t_CHCL ²
Serial Clock Fall Time (Slew Rate)
0.1
t_SLCH
t_{CSS CS# Active Setup Time}
5
t_CHSH
CS# Active Hold Time
5
t_SHCH
CS# Not Active Setup Time
5
t_CHSL
CS# Not Active Hold Time
5
t_SHSL
t_CSH
CS# High Time for read
CS# High Time for program/erase
10
30
t_SHQZ ²
t_{DIS Output Disable Time}
6
t_CLQX
t_{HO Output Hold Time}
0
t_DVCH
t_{DSU Data In Setup Time}
2
t_CHDX
t_{DH Data In Hold Time}
5
t_HLCH
HOLD# Low Setup Time ( relative to CLK )
5
t_HHCH
HOLD# High Setup Time ( relative to CLK )
5
t_CHHH
HOLD# Low Hold Time ( relative to CLK )
5
t_CHHL
HOLD# High Hold Time ( relative to CLK )
5
t_HLQZ ²
t_{HZ HOLD# Low to High-Z Output}
6
t_HHQX ²
t_{LZ HOLD# High to Low-Z Output}
6
t_CLQV
t_V
Output Valid from CLK for 30 pF
Output Valid from CLK for 15 pF
8
6
t_WHSL3
Write Protect Setup Time before CS# Low
20
t_SHWL3
Write Protect Hold Time after CS# High
100
t_DP ²
CS# High to Deep Power-down Mode
3
t_RES1 ²
CS# High to Standby Mode without Electronic
Signature read
3
t_RES2 ²
t_W
t_PP
t_SE
t_HBE
t_BE
t_CE
CS# High to Standby Mode with Electronic
Signature read
Write Status Register Cycle Time
Page Programming Time
Sector Erase Time
32KB Block Erase Time
64KB Block Erase Time
Chip Erase Time
1.8
2
50
0.3
2.5
0.04
0.3
0.1
1
0.15
1.2
2
6
t_SR
Software Reset ^{WIP = write operation}
Latency
WIP = not in write operation
10
28
0
Note: 1. t_CH + t_CL must be greater than or equal to 1/ f_C
2. Value guaranteed by characterization, not 100% tested in production.
3. Only applicable as a constraint for a Write status Register instruction when Status Register Protect Bit is set at 1.
Unit
MHz
MHz
MHz
ns
ns
V / ns
V / ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
ms
ms
s
s
s
s
µs
µs
This Data Sheet may be revised by subsequent versions
58
or modifications due to changes in technical specifications.
©2013 Eon Silicon Solution, Inc.,
Rev. A, Issue Date: 2013/12/30
www.eonssi.com