EMLS232TA Datasheet, PDF (12/14 Pages) Emerging Memory & Logic Solutions Inc – 512K x 32 x 4Banks Low Power SDRAM Specificaton

EMLS232TA Series
512K x 32 x 4Banks Low Power SDRAM
A. MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with Normal MRS
Address
BA0 ~ BA1
A10/AP^*1
A9^{*3 A8 A7 A6 A5 A4 A3 A2}
A1
A0
Function
"0" Setting for
Normal MRS
Wrap Mode
0: Wrap on
W.B.L Test Mode
CAS Latency
BT
1: Wrap off
Burst Length
Normal MRS Mode
Test Mode
A8 A7
Type
0
0
Mode Register Set
01
Reserved
10
Reserved
11
Reserved
Write Burst Length
A9
Length
0
Burst
1
Single Bit
CAS Latency
Burst Type
Burst Length
A6 A5 A4 Latency A3
Type
A2 A1 A0
BT=0
BT=1
0
0
0 Reserved
0
Sequential
000
1
1
001
1
1
Interleave
001
2
2
010
2
Mode Select
010
4
4
011
3
BA1 BA0 Mode 0 1 1
8
8
1
0
0 Reserved
1
0
1 Reserved
0
1
1
0 Reserved
1
1
1 Reserved
1
0
0 Reserved Reserved
0
setting
for Nor-
1
mal
MRS
1
0
1
1 Reserved Reserved
0 Reserved Reserved
1
1
1 Full Page Reserved
Full Page Length x32 : 64Mb(256)
Register Programmed with Extended MRS
Address BA1
BA0
A10/AP
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
Function
Mode Select
RFU^*2
DS
RFU^*2
PASR
EMRS for PASR(Partial Array Self Ref.) & DS(Driver Strength)
Mode Select
Driver Strength
BA1 BA0
MODE
A6 A5 Driver Strength A2 A1 A0
0
0
Normal MRS
0
0
Full
000
0
1
Reserved
0
1
1/2 (default)
001
1
0
EMRS for Low Power SDRAM 1
0
1/4
010
1
1
Reserved
1
1
1/8
011
Reserved Address
100
A10/AP
A9
A8
A7
A4
A3
101
110
0
0
0
0
0
0
111
PASR
Size of Refreshed Array
Full Array (default)
1/2 of Full Array
1/4 of Full Array
Reserved
Reserved
Reserved
Reserved
Reserved
NOTE :
1. If A10/AP is high during MRS cycle, “Wrap off mode” function will be enabled. This mode support only sequential burst type.
2. RFU(Reserved for future use) should stay “0” during MRS cycle.
3. If A9 is high during MRS cycle, “Burst Read Single Bit Write” function will be enabled.
Rev 0.3