EMLS232TA Datasheet, PDF (10/14 Pages) Emerging Memory & Logic Solutions Inc – 512K x 32 x 4Banks Low Power SDRAM Specificaton

EMLS232TA Series
512K x 32 x 4Banks Low Power SDRAM
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
Parameter
CLK cycle time
CLK to valid output delay
Output data hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output in Hi-Z
CAS latency=3
CAS latency=2
CAS latency=1
CAS latency=3
CAS latency=2
CAS latency=1
CAS latency=3
CAS latency=2
CAS latency=1
CAS latency=3
CAS latency=2
CAS latency=1
Symbol
t_CC
t_CC
t_CC
t_AC
t_AC
t_AC
t_OH
t_OH
t_OH
t_CH
t_CL
t_SS
t_SH
t_SLZ
t_SHZ
Value
Min
Max
7.5
10
1000
-
6
7
-
2.5
2.5
-
2.5
2.5
2.0
1.0
1.0
6
7
-
Unit
Note
1
!
1,2,3
!
2
!
4
!
4
!
4
!
4
!
2
!
!
NOTE :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1 , (tr/2-0.5) should be added to the parameter.
¨
¨
3. tAC(max) value is measured at the low Vdd(2.6V) and cold temperature(-25 ).

t_AC is measured in the device with half driver strength(C_L=10pF) and under the AC output load condition.
4. Assumed input rise and fall time (tr & tf) = 1 .
¨
If tr & tf is longer than 1 , transient time compensation should be considered,
¨
i.e., [(tr + tf)/2-1] should be added to the parameter.
¨
Rev 0.3