HB54R5128KN-A75B Datasheet, PDF (12/16 Pages) Elpida Memory – 512MB DDR SDRAM SO DIMM

HB54R5128KN-A75B/B75B/10B
DC Characteristics 1 (TA = 0 to 65°C, VCC, VCCQ = 2.5V ± 0.2V, VSS = 0V)
Parameter
Symbol Grade
max.
Unit
Test condition
Notes
Operating current (ACTV-PRE)
ICC0
-A75B
-B75B
-10B
1200
1120
mA
960
CKE ≥ VIH, tRC = min. 1, 2, 5
Operating current (ACTV-READ-PRE) ICC1
-A75B
-B75B
-10B
1640
1520
mA
1360
CKE ≥ VIH, BL = 2,
CL = 2.5, tRC = min.
Idle power down standby current
ICC2P
-A75B
-B75B
-10B
288
240
mA
CKE ≤ VIL
192
Idle standby current
ICC2N
-A75B
-B75B
-10B
640
560
mA
CKE ≥ VIH, /CS ≥ VIH
480
E_{Active power down standby current}
ICC3P
-A75B
-B75B
-10B
400
320
mA
CKE ≤ VIL
240
O^{Active standby current}
ICC3N
-A75B
-B75B
-10B
800
720
640
mA
CKE ≥ VIH, /CS ≥ VIH
tRAS = max.
Operating current
(Burst read operation)
ICC4R
-A75B
-B75B
-10B
2200
2080
mA
1960
CKE ≥ VIH, BL = 2,
CL = 2.5
Operating current
L _{(Burst write operation)}
ICC4W
-A75B
-B75B
-10B
2040
1920
mA
1800
CKE ≥ VIH, BL = 2,
CL = 2.5
Auto refresh current
ICC5
-A75B
-B75B
-10B
2040
1960
mA
1760
tRFC = min.,
Input ≤ VIL or ≥ VIH
Self refresh current
ICC6
48
mA
Input ≥ VCC – 0.2V
Input ≤ 0.2V.
P _{Notes. 1. These ICC data are measured under condition that DQ pins are not connected.}
2. One bank operation.
3. One bank active.
4. All banks idle.
r _{5. Command/Address transition once per one cycle.}
6. Data/Data mask transition twice per one cycle.
o _{7. The ICC data on this table are measured with regard to tCK = min. in general.}
1, 2, 5
4
4
3
3
1, 2, 5, 6
1, 2, 5, 6
DC Characteristics2 (TA = 0 to 65°C, VCC, VCCQ = 2.5V ± 0.2V, VSS = 0V)
d _Parameter
Symbol
min.
max.
Unit
Input leakage current
Output leakage current
u Output high voltage
ct ^{Output low voltage}
ILI
ILO
VOH
VOL
–10
10
µA
–10
10
µA
VTT + 0.76 —
V
—
VTT – 0.76 V
Test condition
VCC ≥ VIN ≥ VSS
VCC ≥ VOUT ≥ VSS
IOH (max.) = –15.2mA
IOL (min.) = 15.2mA
Notes
Data Sheet E0189H40 (Ver. 4.0)
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