E522.31_16 Datasheet, PDF (9/20 Pages) ELMOS Semiconductor AG – CHANNEL SWITCHED MODE CONSTANT CURRENT CONTROLLER

1 CHANNEL SWITCHED MODE CONSTANT CURRENT CONTROLLER
PRODUCTION DATA - JUL 21, 2016
E522.31/33
Electrical Characteristics (continued)
(V_VIN = +5.5V to +55V, T_AMB = -40°C to +125°C, unless otherwise noted. Typical values are at V_VIN = +14V and T_AMB =
+25°C. Positive currents flow into the device pins.)
Description
Condition
Symbol Min Typ Max Unit
RT Resistor Range for Internal
Oscillator Operation ¹⁾
f_OSCIN = 0 Hz
R_RT,INT
50
120 kΩ
OSCIN External Frequency Range ²⁾
Minimum High or Low Pulsewidth
at OSCIN for Synchronization
f_OSCIN,EXT
225
T_{PULSE,MIN,OSCIN} 660
650 kHz
ns
RT Resistor Range for external
Clock Synchronization
225kHz ≤ f_OSC,IN ≤ 650kHz R_RT,EXT
47
137 kΩ
fTrreaqcukienngcbyeftowr eexenteRrn^RTaal ^{nOdscOilSlaCtIoNr 2)}
Synchronization
R_RT,OSCIN
-5
5
%
Typical Range for Spread Spectrum f_OSCIN = 0 Hz
Modulation of internal Oscillator _{only valid for E522.31}
f_SPREAD
-40
40
kHz
Digital Dimming Logic
Minimum PWDIM Pulse Width
PWDIM Frequency
Timeout for CMP and Softstart
Reset
3)
PWDIM = '0'
T_PWDIM,MIN
2
f_PWDIM
20
T_PWM,TIMEOUT
µs
400 2000 Hz
64
ms
LGATE Pullup Resistance
LGATE Pulldown Resistance
Average Current in LGATE
Pullup Current at PWDIM to V3V3
High Threshold at PWDIM
Low Threshold at PWDIM
Typical Delay by Internal Softstart
Ramp (standard setting)
IT_{LJG=ATE2=5°-C5mA}
IT_{LJG=ATE2=5°5CmA}
I = f x _{LGATE,AVG PWDIM}
Q + I _{GATECHARGE LGATE,DC}
V_PWDIM = 1V
V_PWDIM rising
V_PWDIM falling
PWDIM = '1'
(E52231A61C,
E52233A61C) ^{4) 5)}
R_ON,LGATEH
30
Ω
R_ON,LGATEL
18
Ω
I_LGATE,AVG
2
mA
I_PWDIM,PU
-100 -80
-60
µA
V_PWDIM,H
2.1
V
V_PWDIM,L
1.2
V
t_SOFTSTART
7.5
ms
Rising Voltage Slope at CMP during
Softstart (standard setting)
PWDIM = '1'
(E52231A61C,
E52233A61C) ⁵⁾
dV/
dt_CMP,START1
200
mV /
ms
Typical Delay by Internal Softstart
Ramp (fast setting)
PWDIM = '1'
(E52231A61CXFR,
E52233A61CXFR) ^{4) 5)}
t_{SOFTSTART,FAST}
3.75
ms
Rising Voltage Slope at CMP during
Softstart (fast setting)
PWDIM = '1'
(E52231A61CXFR,
E52233A61CXFR) ⁵⁾
dV/
dt_CMP,START2
400
mV /
ms
1) E522.31 drives typical 1.2V to the RT node
2) The external input frequency must be matched to the frequency given by R_RT to detect a valid OSCIN signal
3) Note that the delays in external dimming circuit or magnetic components may limit the dimming pulse width above the
E522.3x limit
4) The time given is the typical delay that is necessary to reach a sufficiently high CMP voltage to regulate a typical application.
May vary depending on implementation details
5) Not production tested
Elmos Semiconductor AG reserves the right to change the detail specifications as may be required to permit improvements in the design of its products.
Elmos Semiconductor AG
Data Sheet
QM-No.: 25DS0085E.01
9/20