GD25LQ256C Datasheet, PDF(28/68 Page) ELM Electronics

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GD25LQ256C Datasheet, PDF (28/68 Pages) ELM Electronics – 256M-bit Serial Flash

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GD25LQ256CWIGx 1.8V Uniform Sector Dual and Quad Serial Flash

7.13. Quad I/O Fast Read (EBH)

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The Quad I/O Fast Read command is similar to the Dual I/O Fast Read command but with the capability

to input the 3-byte address (A23-0) or a 4-byte address (A31-A0) and a âContinuous Read Modeâ byte and

4-dummy clock 4-bit per clock by IO0, IO1, IO3, IO4, each bit being latched in during the rising edge of SCLK,

then the memory contents are shifted out 4-bit per clock cycle from IO0, IO1, IO2, IO3. The command sequence

is shown in followed Figure14. The first byte addressed can be at any location. The address is automatically

incremented to the next higher address after each byte of data is shifted out. The Quad Enable bit (QE) of Status

Quad I/O Fast Read with âContinuous Read Modeâ

The Quad I/O Fast Read command can further reduce command overhead through setting the âContinuous

Read Modeâ bits (M7-0) after the input 3-byte address (A23-A0) or a 4-byte address (A31-A0). If the âContinuous

Read Modeâ bits (M5-4) = (1, 0), then the next Quad I/O Fast Read command (after CS# is raised and then

lowered) does not require the EBH command code. The command sequence is shown in followed Figure14a.

If the âContinuous Read Modeâ bits (M5-4) do not equal to (1, 0), the next command requires the first EBH

command code, thus returning to normal operation. A âContinuous Read Modeâ Reset command can be used to

reset (M5-4) before issuing normal command.

Figure 14. Quad I/O Fast Read Sequence Diagram (M5-4 â (1, 0))

CS#

SCLK

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

SI(IO0)

Command

EBH

40404040

4040 4

SO(IO1)

51515151

5151 5

WP#(IO2)

62626262

6262 6

HOLD#(IO3)

73737373

A23-16 A15-8 A7-0 M7-0

Dummy

7373 7

Byte1 Byte2

Note: The device default is in 24-bit address mode. For 4-byte mode, the address length becomes 32-bit.

Figure 14a. Quad I/O Fast Read Sequence Diagram (M5-4 = (1, 0))

CS#