GD25LQ256C Datasheet, PDF (23/68 Pages) ELM Electronics – 256M-bit Serial Flash

GD25LQ256CWIGx 1.8V Uniform Sector Dual and Quad Serial Flash
7.8. Read Data Bytes (READ) (03H)
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The Read Data Bytes (READ) command is followed by a 3-byte address (A23-A0) or a 4-byte address (A31-A0),
each bit being latched-in during the rising edge of SCLK. Then the memory content, at that address, is shifted
out on SO, each bit being shifted out, at a Max frequency fR, during the falling edge of SCLK. The first byte
addressed can be at any location. The address is automatically incremented to the next higher address after each
byte of data is shifted out. The whole memory can, therefore, be read with a single Read Data Bytes (READ)
command. Any Read Data Bytes (READ) command, while an Erase, Program or Write cycle is in progress, is
rejected without having any effects on the cycle that is in progress.
Figure 9. Read Data Bytes Sequence Diagram
CS#
SCLK
0 1 2 3 4 5 6 7 8 9 10
28 29 30 31 32 33 34 35 36 37 38 39
Command
24-bit address
SI
03H
23 22 21
3210
SO
High-Z
MSB
Data Out1
Data Out2
76543210
MSB
Note: The device default is in 24-bit address mode. For 4-byte mode, the address length becomes 32-bit.
7.9. Read Data Bytes at Higher Speed (Fast Read) (0BH)
The Read Data Bytes at Higher Speed (Fast Read) command is for quickly reading data out. It is followed by a
3-byte address (A23-A0) or a 4-byte address (A31-A0) and a dummy byte, each bit being latched-in during the
rising edge of SCLK. Then the memory content, at that address, is shifted out on SO, each bit being shifted out,
at a Max frequency fC, during the falling edge of SCLK. The first byte addressed can be at any location. The
address is automatically incremented to the next higher address after each byte of data is shifted out.
Figure 10. Read Data Bytes at Higher Speed Sequence Diagram
Note: The device default is in 24-bit address mode. For 4-byte mode, the address length becomes 32-bit.
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Rev.1.0