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GD25LQ40XIGX Datasheet, PDF (45/59 Pages) ELM Technology Corporation – 1.8V Uniform Sector Dual and Quad Serial Flash
GD25LQ40xIGx 1.8V Uniform Sector Dual and Quad Serial Flash
7.30. Read Security Registers (48H)
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The Read Security Registers command is similar to Fast Read command. The command is followed by a
3-byte address (A23-A0) and a dummy byte, each bit being latched-in during the rising edge of SCLK. Then
the memory content, at that address, is shifted out on SO, each bit being shifted out, at a Max frequency fC,
during the falling edge of SCLK. The first byte addressed can be at any location. The address is automatically
incremented to the next higher address after each byte of data is shifted out. Once the A9-A0 address reaches the
last byte of the register (Byte 3FFH), it will reset to 000H, the command is completed by driving CS# high.
Address
Security Register #0
Security Register #1
Security Register #2
Security Register #3
A23-16
00H
00H
00H
00H
A15-12
0000
0001
0010
0011
A11-8
0000
0000
0000
0000
A7-0
Byte Address
Byte Address
Byte Address
Byte Address
Figure 32. Read Security Registers command Sequence Diagram
CS#
SCLK
0 1 2 3 4 5 6 7 8 9 10
28 29 30 31
Command
24-bit address
SI
48H
23 22 21
3210
SO
CS#
SCLK
SI
SO
High-Z
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
Dummy Byte
76543210
Data Out1
Data Out2
76543210765
MSB
MSB
59 - 45
Rev.1.0