GD25LQ40XIGX Datasheet, PDF (15/59 Pages) ELM Technology Corporation – 1.8V Uniform Sector Dual and Quad Serial Flash

GD25LQ40xIGx 1.8V Uniform Sector Dual and Quad Serial Flash
7.1. Write Enable (WREN)(06H)
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The Write Enable (WREN) command is for setting the Write Enable Latch (WEL) bit. The Write Enable Latch
(WEL) bit must be set prior to every Page Program (PP), Sector Erase (SE), Block Erase (BE), Chip Erase (CE),
Write Status Register (WRSR) and Erase/Program Security Registers command. The Write Enable (WREN)
command sequence: CS# goes low → sending the Write Enable command → CS# goes high.
Figure 2. Write Enable Sequence Diagram
CS#
SCLK
SI
SO
01234567
Command
06H
High-Z
Figure 2a. Write Enable Sequence Diagram (QPI)
CS#
SCLK
IO₀
01
Command
06H
IO₁
IO₂
IO₃
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Rev.1.0