DR805X Datasheet, PDF (9/79 Pages) Digital Core Design – 8-bit RISC Microcontroller Instructions set details ver 3.10

DR805x Instructions set details
2.2.4. DATA TRANSFERS
-9-
Mnemonic
Description
MOV A,Rn
Move register to accumulator
MOV A,direct
Move direct byte to accumulator
MOV A,@Ri
Move indirect RAM to accumulator
MOV A,#data
Move immediate data to accumulator
MOV Rn,A
Move accumulator to register
MOV Rn,direct
Move direct byte to register
MOV Rn,#data
Move immediate data to register
MOV direct,A
Move accumulator to direct
SFR byte
RAM byte
MOV direct,Rn
Move register to direct
SFR byte
RAM byte
MOV direct1,direct2 Move direct byte to direct
SFR byte
RAM byte
MOV direct,@Ri
Move indirect RAM to direct
SFR byte
RAM byte
MOV direct,#data Move immediate data to direct byte
MOV @Ri,A
Move accumulator to indirect RAM
MOV @Ri,direct
Move direct byte to indirect RAM
MOV @Ri,#data
Move immediate data to indirect RAM
MOV DPTR,#data16 Load data pointer with a 16-bit constant
MOVC A,@A+DPTR Move code byte relative to DPTR to accumulator
MOVC A,@A+PC Move code byte relative to PC to accumulator
MOVX A,@Ri
Move external RAM (8-bit address) to A
MOVX A,@DPTR Move external RAM (16-bit address) to A
MOVX @Ri,A
Move A to external RAM (8-bit address)
MOVX @DPTR,A Move A to external RAM (16-bit address)
PUSH direct
Push direct byte onto stack
POP direct
Pop direct byte from stack to
SFR
RAM
XCH A,Rn
Exchange register with accumulator
XCH A,direct
Exchange direct byte with accumulator
XCH A,@Ri
Exchange indirect RAM with accumulator
XCHD A,@Ri
Exchange low-order nibble indirect RAM with A
Table 6. Data transfer
* MOVX cycles depends on STRETCH register
Code
0xE8-0xEF
0xE5
0xE6-0xE7
0x74
0xF8-0xFF
0xA8-0xAF
0x78-0x7F
0xF5
0x88-8F
85
86-87
75
F6-F7
A6-A7
76-77
90
93
83
E2-E3
E0
F2-F3
F0
C0
D0
C8-CF
C5
C6-C7
D6-D7
Bytes Cycles
1
1
2
2
1
2
2
2
1
2
2
4
2
2
2
2
3
2
2
3
3
3
4
2
3
4
3
3
1
3
2
4
2
3
3
3
1
4
1
4
1
3^*
1
2^*
1
4^*
1
3^*
2
4
2
2
3
1
2
2
3
1
3
1
3
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