DR805X Datasheet, PDF (50/79 Pages) Digital Core Design – 8-bit RISC Microcontroller Instructions set details ver 3.10

DR805x Instructions set details
3.24.7.
MOV RN, #DATA
- 50 -
Operation: (PC) ← (PC) + 2
(Rn) ← #data
Bytes:
2
Cycles:
2
Encoding:
01111 r r r
immediate data
3.24.8.
MOV DIRECT, A
Operation: (PC) ← (PC) + 2
(direct) ← (A)
Bytes:
Cycles:
2
2 – destination inside SFR
3 – destination inside RAM
Encoding:
11110101
direct address
3.24.9.
MOV DIRECT, RN
Operation: (PC) ← (PC) + 2
(direct) ← (Rn)
Bytes:
Cycles:
2
2 – destination inside SFR
3 – destination inside RAM
Encoding:
10001 r r r
direct address
3.24.10. MOV DIRECT, DIRECT
Operation: (PC) ← (PC) + 3
(direct) ← (direct)
Bytes:
Cycles:
3
3 – destination inside SFR
4 – destination inside RAM
Encoding:
10000101
direct address (source)
direct address (destination)
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