DR805X Datasheet, PDF (77/79 Pages) Digital Core Design – 8-bit RISC Microcontroller Instructions set details ver 3.10

DR805x Instructions set details
3.44. XRL
- 77 -
Instruction: XRL <dest-byte>, <src-byte>
Function: Logical Exclusive OR for byte variables
Description:
XRL performs the bit wise logical Exclusive OR operation between the
indicated variables, storing the results in the destination. No flags are
affected (except P, if <dest-byte> = A).
The two operands allow six addressing mode combinations. When the
destination is the accumulator, the source can use register, direct,
register-indirect, or immediate addressing; when the destination is a
direct address, the source can be accumulator or immediate data.
Note:
When this instruction is used to modify an output port, the value used
as the original port data will be read from the output data latch, not the
input pins.
3.44.1.
XRL A, RN
Operation:
(PC) ← (PC) + 1
(A) ← (A) xor (Rn)
Bytes:
1
Cycles:
2
Encoding:
01101 r r r
3.44.2.
XRL A, DIRECT
Operation: (PC) ← (PC) + 2
(A) ← (A) xor (direct)
Bytes:
2
Cycles:
3
Encoding:
01100101
direct address
All trademarks mentioned in this document
are trademarks of their respective owners.
http://www.DigitalCoreDesign.com
http://www.dcd.pl
Copyright 1999-2003 DCD – Digital Core Design. All Rights Reserved.