DS1495 Datasheet, PDF (8/19 Pages) Dallas Semiconductor – RAMified Real Time Clock

DS1495/DS1497
OSCILLATOR CONTROL BITS
When the DS1495/DS1497 is shipped from the factory,
the internal oscillator is turned off. This feature prevents
the lithium battery from being used until it is installed in a
system. A pattern of 010 in bits 4 through 6 of Register A
will turn the oscillator on and enable the countdown
chain. A pattern of 11X will turn the oscillator on, but
holds the countdown chain of the oscillator in reset. All
other combinations of bits 4 through 6 keep the oscilla-
tor off.
SQUARE WAVE OUTPUT SELECTION
Thirteen of the 15 divider taps are made available to a
1-of-15 selector, as shown in the block diagram of Fig-
ure 1. The first purpose of selecting a divider tap is to
generate a square wave output signal on the SQW pin.
The RS0-RS3 bits in Register A establish the square
wave output frequency. These frequencies are listed in
Table 2. The SQW frequency selection shares its
1-of-15 selector with the periodic interrupt generator.
Once the frequency is selected, the output of the SQW
pin can be turned on and off under program control with
the square wave enable bit (SQWE).
PERIODIC INTERRUPT SELECTION
The periodic interrupt will cause the IRQ pin to go to an
active state from once every 500 ms to once every
122 µs. This function is separate from the alarm inter-
rupt which can be output from once per second to once
per day. The periodic interrupt rate is selected using the
same Register A bits which select the square wave fre-
quency (see Table 1). Changing the Register A bits af-
fects both the square wave frequency and the periodic
interrupt output. However, each function has a separate
enable bit in Register B. The SQWE bit controls the
square wave output. Similarly, the periodic interrupt is
enabled by the PIE bit in Register B. The periodic inter-
rupt can be used with software counters to measure in-
puts, create output intervals, or await the next needed
software function.
PERIODIC INTERRUPT RATE AND SQUARE WAVE OUTPUT FREQUENCY Table 2
SELECT BITS REGISTER A
RS3
RS2
RS1
RS0
t_PI PERIODIC
INTERRUPT RATE
SQW OUTPUT
FREQUENCY
0
0
0
0
None
None
0
0
0
1
3.90625 ms
256 Hz
0
0
1
0
7.8125 ms
128 Hz
0
0
1
1
122.070 µs
8.192 KHz
0
1
0
0
244.141 µs
4.096 KHz
0
1
0
1
488.281 µs
2.048 KHz
0
1
1
0
976.5625 µs
1.024 KHz
0
1
1
1
1.953125 ms
512 Hz
1
0
0
0
3.90625 ms
256 Hz
1
0
0
1
7.8125 ms
128 Hz
1
0
1
0
15.625 ms
64 Hz
1
0
1
1
31.25 ms
32 Hz
1
1
0
0
62.5 ms
16 Hz
1
1
0
1
125 ms
8 Hz
1
1
1
0
250 ms
4 Hz
1
1
1
1
500 ms
2 Hz
020894 8/19