DS1495 Datasheet, PDF (15/19 Pages) Dallas Semiconductor – RAMified Real Time Clock

BUS READ/WRITE TIMING
A0-A5
RTC
XRAM
WR
DATA BUS
WRITE
DATA
D0–D7
DATA BUS
READ
DATA
D0–D7
RD
tF
t _CWS
t _AWS
t
ARS
t _CRS
DS1495/DS1497
t _CYC
VALID
t
F
tR
PWRWL
t _DSW
VALID
tR
t _CH
t
AH
t _DHW
t _DDR
PWRWL
VALID
t _CH
t
DHR
t _AH
POWER-DOWN/ POWER-UP TIMING
PARAMETER
SYMBOL
(t_A = 25°C)
MIN
TYP
MAX UNITS NOTES
CE High to Power Fail
t_PF
0
ns
Recovery at Power Up
t_REC
150
ms
V_CC Slew Rate Power Down
t_F
300
µs
4.0 <V_CC < 4.5V
V_CC Slew Rate Power Down
t_FB
10
µs
3.0 <V_CC< 4.0V
V_CC Slew Rate Power Up
t_R
0
µs
4.5V>V_CC>4.0V
Expected Data Retention
t_DR
10
years
NOTE:
CE is chip enabled for access, an internal signal which is defined by (RD + WR) (XRAM + RTC).
CAPACITANCE
PARAMETER
Input Capacitance
Output Capacitance
(t_A = 25°C)
SYMBOL MIN
TYP
MAX
UNITS NOTES
C_IN
C_OUT
12
pF
12
pF
020894 15/19