DS1220AB Datasheet, PDF (8/9 Pages) Dallas Semiconductor – 16k Nonvolatile SRAM

DS1220AB/AD
7. If the CE high transition occurs prior to or simultaneously with the WE high transition, the output
buffers remain in a high-impedance state during this period.
8. If WE is low or the WE low transition occurs prior to or simultaneously with the CE low transition,
the output buffers remain in a high-impedance state during this period.
9. Each DS1220AB and each DS1220AD has a built-in switch that disconnects the lithium source until
V_CC is first applied by the user. The expected t_DR is defined as accumulative time in the absence of
V_CC starting from the time power is first applied by the user.
10. All AC and DC electrical characteristics are valid over the full operating temperature range. For
commercial products, this range is 0°C to 70°C. For industrial products (IND), this range is -40°C to
+85°C.
11. In a power down condition the voltage on any pin may not exceed the voltage on V_CC .
12. t_WR1 , t_DH1 are measured from WE going high.
13. t_WR2 , t_DH2 are measured from CE going high.
14. DS1220AB and DS1220AD modules are recognized by Underwriters Laboratory (U.L.) under file
E99151.
DC TEST CONDITIONS
Outputs Open
All Voltages Are Referenced to Ground
AC TEST CONDITIONS
Output Load: 100 pF + 1TTL Gate
Input Pulse Levels: 0 - 3.0V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input Pulse Rise and Fall Times: 5ns
ORDERING INFORMATION
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