DS1258Y Datasheet, PDF (7/8 Pages) Dallas Semiconductor – 128k x 16 Nonvolatile SRAM

DS1258Y/AB
8) If WE is low or the WE low transition occurs prior to or simultaneously with the CEU or CEL low
transition, the output buffers remain in a high impedance state during this period.
9) Each DS1258 has a built-in switch that disconnects the lithium source until the user first applies V_CC.
The expected t_DR is defined as accumulative time in the absence of V_CC starting from the time power
is first applied by the user. This parameter is assured by component selection, process control, and
design. It is not measured directly during production testing.
10) All AC and DC electrical characteristics are valid over the full operating temperature range. For
commercial products, this range is 0°C to +70°C. For industrial products, this range is -40°C to
+85°C.
11) In a power-down condition the voltage on any pin may not exceed the voltage on V_CC.
12) t_WR1, t_DH1 are measured from WE going high.
13) t_WR2, t_DH2 are measured from CEU OR CEL going high.
14) DS1258 DIP modules are recognized by Underwriters Laboratory (U.L.^®) under file E99151.
DC TEST CONDITIONS
Outputs Open
Cycle = 200ns
All voltages are referenced to ground
ORDERING INFORMATION
AC TEST CONDITIONS
Output Load: 100 pF + 1TTL Gate
Input Pulse Levels:
0.0V to 3.0V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input pulse Rise and Fall Times: 5ns
DS1258 TTP - SSS - III
Operating Temperature Range
blank: 0°C to 70°C
IND: -40°C to +85°C
Access Speed
70: 70ns
100: 100ns
Package Type
blank: 40-pin (600mil) DIP
V_CC Tolerance
AB: ±5%
Y: ±10%
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