DS1390 Datasheet, PDF (17/24 Pages) Maxim Integrated Products – Low-Voltage SPI/3-Wire RTCs with Trickle Charger

Low-Voltage SPI/3-Wire RTCs with
Trickle Charger
BIT 7
EOSC
BIT 6
0
BIT 5
BBSQI
BIT 4
RS2
The INTCN bit used in the DS1390/DS1393 becomes
the SQW pin-enable bit in the DS1392. This bit powers
up a zero, making SQW active.
BIT 7
OSF
BIT 6
0
BIT 5
0
BIT 4
0
BIT 3
RS1
Control Register (0D/8Dh) (DS1392 Only)
BIT 2
ESQW
BIT 1
0
BIT 0
AIE
BIT 3
0
BIT 2
0
Status Register (0E/8Eh)
BIT 1
0
BIT 0
AF
Bit 7: Oscillator Stop Flag (OSF). A logic 1 in this bit
indicates that the oscillator has stopped or was
stopped for some time and may be used to judge the
validity of the clock and calendar data. This bit is
edge-triggered and is set to logic 1 when the internal
circuitry senses the oscillator has transitioned from a
normal run state to a STOP condition. The following are
examples of conditions that can cause the OSF bit to
be set:
1) The first time power is applied.
2) The voltage present on V_CC and V_BACKUP is
insufficient to support oscillation.
3) The EOSC bit is turned off.
4) External influences on the crystal (i.e., noise,
leakage, etc.).
This bit remains at logic 1 until written to logic 0. This
bit can only be written to logic 0. Attempting to write
OSF to logic 1 leaves the value unchanged.
Bit 6: Alarm Flag (AF). A logic 1 in the AF bit indicates
that the time matched the alarm registers. If the AIE bit
is logic 1 and the INTCN bit is set to logic 1, the
SQW/INT pin is also asserted. AF is cleared when writ-
ten to logic 0. This bit can only be written to logic 0.
Attempting to write to logic 1 leaves the value
unchanged.
Trickle-Charge Register (0F/8Fh)
The simplified schematic in Figure 9 shows the basic
components of the trickle charger. The trickle-charge
select (TCS) bits (bits 4 to 7) control the selection of
the trickle charger. To prevent accidental enabling,
only a pattern on 1010 enables the trickle charger. All
other patterns disable the trickle charger. The trickle
charger is disabled when power is first applied. The
diode-select (DS) bits (bits 2 and 3) select whether or
not a diode is connected between V_CC and V_BACKUP.
If DS is 01, no diode is selected or if DS is 10, a diode
is selected. The ROUT bits (bits 0 and 1) select the
value of the resistor connected between V_CC and
V_BACKUP. Table 5 shows the resistor selected by the
resistor-select (ROUT) bits and the diode selected by
the diode-select (DS) bits.
Table 5. Trickle-Charge Register
TCS3 TCS2 TCS1 TCS0
DS1
X
X
X
X
0
X
X
X
X
1
X
X
X
X
X
1
0
1
0
0
1
0
1
0
1
1
0
1
0
0
1
0
1
0
1
1
0
1
0
0
1
0
1
0
1
0
0
0
0
0
DS0 ROUT1 ROUT0
FUNCTION
0
X
X
Disabled
1
X
X
Disabled
X
0
0
Disabled
1
0
1
No diode, 250Ω resistor
0
0
1
One diode, 250Ω resistor
1
1
0
No diode, 2kΩ resistor
0
1
0
One diode, 2kΩ resistor
1
1
1
No diode, 4kΩ resistor
0
1
1
One diode, 4kΩ resistor
0
0
0
Initial default value—disabled
____________________________________________________________________ 17