DS1390 Datasheet, PDF (12/24 Pages) Maxim Integrated Products – Low-Voltage SPI/3-Wire RTCs with Trickle Charger

Low-Voltage SPI/3-Wire RTCs with
Trickle Charger
However, when V_CC falls below V_PF, the internal clock
registers are blocked from any access. If V_PF is less
than V_BACKUP, the device power is switched from V_CC
to V_BACKUP when V_CC drops below V_PF. If V_PF is
greater than V_BACKUP, the device power is switched
from V_CC to V_BACKUP when V_CC drops below
V_BACKUP. The registers are maintained from the
V_BACKUP source until V_CC is returned to nominal levels.
See the Functional Diagram for the main elements of
these serial RTCs.
Table 1. Crystal Specifications*
PARAMETER SYMBOL MIN TYP MAX UNITS
Nominal Frequency
f_O
Series Resistance
ESR
32.768
kHz
55
kΩ
Load Capacitance
C_L
6
pF
*The crystal, traces, and crystal input pins should be isolated
from RF generating signals. Refer to Application Note 58:
Crystal Considerations for Dallas Real-Time Clocks for addi-
tional specifications.
Oscillator Circuit
All four devices use an external 32.768kHz crystal. The
oscillator circuit does not require any external resistors
or capacitors to operate. Table 1 specifies several crys-
tal parameters for the external crystal, and Figure 7
shows a functional schematic of the oscillator circuit. If
a crystal is used with the specified characteristics, the
startup time is usually less than one second.
Clock Accuracy
The accuracy of the clock is dependent upon the accu-
racy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and
the capacitive load for which the crystal was trimmed.
Additional error is added by crystal frequency drift
caused by temperature shifts. External circuit noise
coupled into the oscillator circuit can result in the clock
running fast. Figure 8 shows a typical PC board layout
for isolation of the crystal and oscillator from noise.
Refer to Application Note 58: Crystal Considerations
with Dallas Real-Time Clocks for detailed information.
LOCAL GROUND PLANE (LAYER 2)
COUNTDOWN
CHAIN
C_L1
X1
C_L2
RTC REGISTERS
DS139x
X2
X1
CRYSTAL
X2
NOTE: AVOID ROUTING SIGNAL LINES
IN THE CROSSHATCHED AREA
(UPPER LEFT QUADRANT) OF
THE PACKAGE UNLESS THERE IS
GND
A GROUND PLANE BETWEEN THE
SIGNAL LINE AND THE DEVICE PACKAGE.
CRYSTAL
Figure 7. Oscillator Circuit Showing Internal Bias Network
Figure 8. Layout Example
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