CY8C21345AUTO Datasheet, PDF (9/36 Pages) Cypress Semiconductor – Automotive PSoC® Programmable System-on-Chip™

CY8C21345, CY8C21645
CY8C22345, CY8C22345H, CY8C22645
48-Pin Part Pinout
Table 3. 48-Pin Part Pinout (SSOP)
Pin
No.
Type
Pin Name
Digital Analog
Description
1
I/O I, MR
P0[7] Analog column mux input, C_MOD
capacitor pin
2
I/O I, ML
P0[5] Analog column mux input, C_MOD
capacitor pin
3
I/O I, ML
P0[3] Analog column mux input
4
I/O I, ML
P0[1] Analog column mux input
5
I/O I, ML
P2[7] Direct input to analog block
6
I/O
ML
P2[5] Optional SAR ADC external reference
7
I/O
ML
P2[3]
8
I/O
ML
P2[1]
9
Power
10 I/O
ML
V_DD
P4[5]
Supply voltage
11 I/O
ML
P4[3]
12 I/O
ML
P4[1]
13
Power
14 I/O
ML
V_SS
P3[7]
Ground connection
15 I/O
ML
P3[5]
16 I/O
ML
P3[3]
17 I/O
ML
P3[1]
18
NC Not connected
19
20 I/O
ML
21 I/O
ML
NC
P1[7]
P1[5]
Not connected
I²C Serial Clock
I²C Serial Data
22 I/O
ML
23 I/O
ML
P1[3]
P1[1]
Crystal Input (XTALin), I²C SCL,
ISSP-SCLK^[6]
24
Power
25 I/O
MR
V_SS
P1[0]
Crystal Output (XTALout), I²C SDA,
ISSP-SDATA^[6]
26 I/O
MR
P1[2]
27 I/O
MR
P1[4] Optional external clock input
28 I/O
MR
P1[6]
29
NC Not connected
30
NC Not connected
31 I/O
MR
P3[0]
32 I/O
MR
P3[2]
33 I/O
MR
P3[4]
34 I/O
MR
P3[6]
35
Input
XRES Active high external reset with internal
pull-down
36 I/O
MR
P4[0]
37 I/O
MR
P4[2]
38 I/O
MR
P4[4]
39
Power
40 I/O
MR
V_SS
P2[0]
Ground Connection
Figure 4. CY8C21645 and CY8C22645
48-Pin PSoC Device
AI, MR, P0[7] 1
AI, ML, P0[5] 2
AI, ML, P0[3] 3
AI, ML, P0[1] 4
AI, ML, P2[7] 5
EXTREF, ML, P2[5] 6
ML, P2[3] 7
ML, P2[1] 8
VDD 9
ML, P4[5] 10
ML, P4[3] 11
ML, P4[1] 12
VSS 13
ML, P3[7] 14
ML, P3[5] 15
ML, P3[3] 16
ML, P3[1] 17
NC 18
NC 19
I2C SCL, ML, P1[7] 20
I2C SDA, ML, P1[5] 21
ML, P1[3] 22
XTALin, I2C SCL, ML, P1[1] 23
VSS 24
SSOP
48 VDD
47 P0[6], MR, AI
46 P0[4], MR, AI
45 P0[2], MR, AI
44 P0[0], MR, AI
43 P2[6], MR, AI
42 P2[4], MR
41 P2[2], MR
40 P2[0], MR
39 VSS
38 P4[4], MR
37 P4[2], MR
36 P4[0], MR
35 XRES
34 P3[6], MR
33 P3[4], MR
32 P3[2], MR
31 P3[0], MR
30 NC
29 NC
28 P1[6], MR
27 P1[4], MR, EXTCLK
26 P1[2], MR
25 P1[0], MR, I2C SDA, XTALout
Note
6. These are the ISSP pins, which are not High Z after exiting a reset state. See the PSoC Technical Reference Manual for CY8C21x45 and CY8C22x45 devices for
details.
Document Number: 001-55397 Rev. *I
Page 9 of 36
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