CY8C21345AUTO Datasheet, PDF (8/36 Pages) Cypress Semiconductor – Automotive PSoC® Programmable System-on-Chip™

CY8C21345, CY8C21645
CY8C22345, CY8C22345H, CY8C22645
Pinouts
The automotive CY8C21x45 and CY8C22x45 PSoC devices are available in a variety of packages which are listed and illustrated in
the following tables. Every port pin (labeled with a “P”) is capable of digital I/O and connection to the common analog mux bus.
However, V_SS, V_DD, and XRES are not capable of digital I/O.
28-Pin Part Pinout
Table 2. 28-Pin Part Pinout (SSOP)
Type
Pin
No.
Digital
Analog
Pin Name
Description
Figure 3. CY8C21345, CY8C22345, and CY8C22345H
28-Pin PSoC Device
1
I/O I, MR
2
I/O I, ML
3
I/O I, ML
4
I/O I, ML
5
I/O I, ML
6
I/O
ML
7
I/O
ML
8
I/O
ML
9
Power
10 I/O
ML
11 I/O
ML
P0[7]
P0[5]
P0[3]
P0[1]
P2[7]
P2[5]
P2[3]
P2[1]
V_SS
P1[7]
P1[5]
Analog column mux input, C_MOD
capacitor pin
Analog column mux input, C_MOD
capacitor pin
Analog column mux input
Analog column mux input
Direct input to analog block
Optional SAR ADC external reference
(EXTREF)
Ground connection
I²C Serial Clock (SCL)
I²C Serial Data (SDA)
AI, MR, P0[7] 1
AI, ML, P0[5] 2
AI, ML, P0[3] 3
AI, ML, P0[1] 4
AI, ML, P2[7] 5
EXTREF, ML, P2[5] 6
ML, P2[3] 7
ML, P2[1] 8
VSS 9
I2C SCL, ML, P1[7] 10
I2C SDA, ML, P1[5] 11
ML, P1[3] 12
XTALin, I2C SCL, ML, P1[1] 13
VSS 14
SSOP
28 VDD
27 P0[6], MR, AI
26 P0[4], MR, AI
25 P0[2], MR, AI
24 P0[0], MR, AI
23 P2[6], MR, AI
22 P2[4], MR
21 P2[2], MR
20 P2[0], MR
19 XRES
18 P1[6], MR
17 P1[4], MR, EXTCLK
16 P1[2], MR
15 P1[0], MR, I2C SDA, XTALout
12 I/O
ML
13 I/O
ML
P1[3]
P1[1]
Crystal Input (XTALin), I²C SCL,
ISSP-SCLK^[5]
14
Power
15 I/O
MR
V_SS
P1[0]
Ground Connection
Crystal Output (XTALout), I²C SDA,
ISSP-SDATA^[5]
16 I/O
MR
P1[2]
17 I/O
MR
P1[4] Optional external clock input (EXTCLK)
18 I/O
MR
P1[6]
19
Input
XRES Active high external reset with internal
pull-down
20 I/O
MR
P2[0]
21 I/O
MR
P2[2]
22 I/O
MR
P2[4]
23 I/O I, MR
P2[6] Direct input to analog block
24 I/O I, MR
P0[0] Analog column mux input
25 I/O I, MR
P0[2] Analog column mux input
26 I/O I, MR
P0[4] Analog column mux input
27 I/O I, MR
P0[6] Analog column mux input
28
Power
V_DD Supply voltage
LEGEND: A = Analog, I = Input, O = Output, MR= Right analog mux bus input, ML= Left analog mux bus input.
Note
5. These are the ISSP pins, which are not High Z after exiting a reset state. See the PSoC Technical Reference Manual for CY8C21x45 and CY8C22x45 devices for details.
Document Number: 001-55397 Rev. *I
Page 8 of 36
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