BCM43903KUBGT Datasheet, PDF (9/87 Pages) Cypress Semiconductor – WICED™ IEEE 802.11 b/g/n SoC with an Embedded Applications Processor

BCM43903 Preliminary Data Sheet
List of Figures
List of Figures
Figure 1: Functional Block Diagram................................................................................................................... 2
Figure 2: Block Diagram and I/O...................................................................................................................... 11
Figure 3: Typical Power Topology (Page 1 of 2).............................................................................................. 15
Figure 4: Typical Power Topology (Page 2 of 2).............................................................................................. 16
Figure 5: Recommended Oscillator Configuration ........................................................................................... 20
Figure 6: Recommended Circuit to Use With an External Reference Clock .................................................... 21
Figure 7: Broadcom 2-Wire External Coexistence Interface ............................................................................ 29
Figure 8: WLAN MAC Architecture .................................................................................................................. 32
Figure 9: WLAN PHY Block Diagram............................................................................................................... 37
Figure 10: Radio Functional Block Diagram .................................................................................................... 39
Figure 11: 151-Ball WLBGA Map—Top View with Balls Facing Down ........................................................... 40
Figure 12: Port Locations for WLAN Testing ................................................................................................... 62
Figure 13: SPI Flash Read-Register Timing .................................................................................................... 76
Figure 14: SPI Flash Write-Register Timing .................................................................................................... 77
Figure 15: Memory Fast-Read Timing ............................................................................................................. 78
Figure 16: Memory-Write Timing ..................................................................................................................... 79
Figure 17: SPI Flash Timing Parameters Diagram .......................................................................................... 80
Figure 18: REG_ON = High, No HIB_REG_ON_OUT Connection to REG_ON ............................................. 82
Figure 19: HIB_REG_ON_IN = High, HIB_REG_ON_OUT Connected to REG_ON ...................................... 82
Figure 20: WLBGA Package ............................................................................................................................ 84
Broadcom^®
March 12, 2016 • 43903-DS102-R
BROADCOM CONFIDENTIAL
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