English
Language : 

BCM43903KUBGT Datasheet, PDF (27/87 Pages) Cypress Semiconductor – WICED™ IEEE 802.11 b/g/n SoC with an Embedded Applications Processor
BCM43903 Preliminary Data Sheet
Applications Subsystem External Interfaces
Section 5: Applications Subsystem
External Interfaces
GPIO
There are 17 general-purpose I/O (GPIO) pins available on the BCM43903. The GPIOs can be used to connect
to various external devices.
Upon power-up and reset, these pins are tristated. Subsequently, they can be programmed to be either input or
output pins via the GPIO control register. In addition, the GPIO pins can be assigned to various other functions.
Apart from other functions, GPIOs are used to set bootstrap options and use the JTAG interface for debugging
during software development.
Broadcom Serial Control
The BCM43903 has two Broadcom Serial Control (BSC2) master interfaces for external communication with
codecs, DACs, NVRAM, etc. The I/O pads can be configured as pull-ups or pull-ups can be installed on the
reference design to support a multimaster on an open drain bus.
JTAG and ARM Serial Wire Debug
The BCM43903 supports the IEEE 1149.1 JTAG boundary scan standard for performing device package and
PCB assembly testing during manufacturing. In addition, the JTAG interface allows Broadcom to assist
customers by using proprietary debug and characterization test tools during board bring-up. Therefore, it is
highly recommended to provide access to the JTAG pins by means of test points or a header on all PCB designs.
The BCM43903 also supports ARM Serial Wire Debug (SWD) for connecting a JTAG debugger directly to both
ARM Cortex-R4s. For SWD, the combination of a clock and a bidirectional signal (on a single pin) provides
normal JTAG debug and test functionality. The reduced pin-count SWD interface is a high-performance
alternative to the JTAG interface.
2. Broadcom Serial Control is an I2C compatible interface.
Broadcom®
March 12, 2016 • 43903-DS102-R
BROADCOM CONFIDENTIAL
Page 26