BCM43903KUBGT Datasheet, PDF (29/87 Pages) Cypress Semiconductor – WICED™ IEEE 802.11 b/g/n SoC with an Embedded Applications Processor

BCM43903 Preliminary Data Sheet
SPI Flash
SPI Flash
The SPI flash interface supports the following features:
• A SPI-compatible serial bus.
• An 80 MHz (maximum) clock frequency.
• Quad I/O, which provides increased throughput to 40 MB/s.
• Support for either ×1 or ×4 addresses with ×4 data.
• 3-bytes and 4-byte addressing modes.
• A configurable dummy-cycle count that is programmable from 1 to 15.
• Programmable instructions output to serial flash.
• An option to change the sampling edge from rising-edge to falling-edge for read-back data when in high-
speed mode.
UART
A high-speed 4-wire CTS/RTS UART interface can be enabled by software and has dedicated pins. Provided
primarily for debugging during development, this UART enables the BCM43903 to operate as RS-232 data
termination equipment (DTE) for exchanging and managing data with other serial devices. It is compatible with
the industry standard 16550 UART and provides a FIFO size of 64 × 8 in each direction.
There are two low-speed UART interfaces on the BCM43903. Each functions as a standard 2-wire UART. They
are also enabled as alternate functions on GPIOs and can be enabled independently of the 4-wire fast UART.
Broadcom^®
March 12, 2016 • 43903-DS102-R
BROADCOM CONFIDENTIAL
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