BCM43903KUBGT Datasheet, PDF (79/87 Pages) Cypress Semiconductor – WICED™ IEEE 802.11 b/g/n SoC with an Embedded Applications Processor

BCM43903 Preliminary Data Sheet
SPI Flash Timing
Memory Fast-Read Timing
Figure 15 shows the SPI flash extended and quad memory fast-read timing.
Note: Regarding Figure 15:
1. 24-bit addressing is used, so A[MAX] = A[23] and A[MIN] = A[0].
2. For an extended SPI protocol, C_x = 7 + (A[MAX] + 1).
3. For a quad SPI protocol, C_x = 1 + (A[MAX] + 1)/4.
Figure 15: Memory Fast-Read Timing
Extended
C
DQ0
DQ1
0
7
8
Command
MSB
High-Z
LSB
A[MAX]
Cx
A[MIN]
Quad
C
DQ[3:0]
0
1
2
Command
MSB
LSB
A[MAX]
Cx
A[MIN]
Dummy Cycles
DOUT
MSB
Dummy Cycles
DOUT
MSB
DOUT
DOUT
LSB
DOUT
DOUT
DOUT
DOUT
DOUT
Don’t care
DOUT
DOUT
LSB
DOUT
Broadcom^®
March 12, 2016 • 43903-DS102-R
BROADCOM CONFIDENTIAL
Page 78