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CY8C3246LTI-149 Datasheet, PDF (86/128 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)
PSoC® 3: CY8C32 Family Data Sheet
11.5.2 Voltage Reference
Table 11-22. Voltage Reference Specifications
See also ADC external reference specifications in Section 11.5.1.
Parameter
Description
VREF
Precision reference voltage
Conditions
Min
Typ
Max
Units
Initialtrimming, 1.014 (–1%) 1.024 1.034 (+1%) V
25 °C
11.5.3 Analog Globals
Table 11-23. Analog Globals Specifications
Parameter
Description
Rppag
Resistance pin-to-pin through P2[4], AGL0, DSM INP,
AGL1, P2[5][49]
Rppmuxbus Resistance pin-to-pin through P2[3], amuxbusL,
P2[4][49]
Conditions
VDDA = 3 V
VDDA = 3 V
Min
Typ
Max
Units
–
1472
2200

–
706
1100

11.5.4 Comparator
Table 11-24. Comparator DC Specifications
Parameter
Description
Conditions
Min Typ
Max
Input offset voltage in fast mode
Factory trim, VDDA > 2.7 V,
–
10
VIN  0.5 V
Input offset voltage in slow mode
Factory trim, VIN  0.5 V
–
9
VOS
Input offset voltage in fast mode[50]
Custom trim
–
–
4
Input offset voltage in slow mode[50]
Custom trim
–
–
4
Input offset voltage in ultra low-power
mode
VDDA ≤ 4.6 V
–
±12
–
VHYST
VICM
CMRR
ICMP
Hysteresis
Input common mode voltage
Common mode rejection ratio
High current mode/fast mode[51]
Low current mode/slow mode[51]
Ultra low-power mode[51]
Hysteresis enable mode
High current / fast mode
Low current / slow mode
Ultra low power mode
VDDA ≤ 4.6 V
VDDA ≤ 4.6 V
–
10
32
VSSA
–
VDDA
VSSA
–
VDDA
VSSA
–
VDDA –
1.15
–
50
–
–
–
400
–
–
100
–
6
–
Table 11-25. Comparator AC Specifications
Parameter
Description
Conditions
Min Typ
Response time, high current mode[51] 50 mV overdrive, measured pin-to-pin –
75
Tresp
Response time, low current mode[51] 50 mV overdrive, measured pin-to-pin – 155
Response time, ultra low-power mode[51] 50 mV overdrive, measured
pin-to-pin, VDDA ≤ 4.6 V
–
55
Max
110
200
–
Units
mV
mV
mV
mV
mV
mV
V
V
dB
µA
µA
µA
Units
ns
ns
µs
Notes
49.
The
mux
resistance
bus under
of the
these
analog global and analog mux bus
conditions is not recommended
is
high
if
VDDA
2.7
V,
and
the
chip
is
in
either
sleep
or
hibernate
mode.
Use
of
analog
global
and
analog
50. The recommended procedure for using a custom trim value for the on-chip comparators can be found in the TRM.
51. Based on device characterization (Not production tested).
Document Number: 001-56955 Rev. *Y
Page 86 of 128