CY8C3246LTI-149 Datasheet, PDF (67/128 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)

PSoC^® 3: CY8C32 Family Data Sheet
11. Electrical Specifications
Specifications are valid for –40 °C  T_A  85 °C and T_J  100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V,
except where noted. The unique flexibility of the PSoC UDBs and analog blocks enable many functions to be implemented in PSoC
Creator components, see the component datasheets for full AC/DC specifications of individual functions. See the “Example
Peripherals” section on page 45 for further explanation of PSoC Creator components.
11.1 Absolute Maximum Ratings
Table 11-1. Absolute Maximum Ratings DC Specifications^[15]
Parameter
Description
Conditions
Min
Typ
Max Units
V_DDA
V_DDD
V_DDIO
V_CCA
V_CCD
V_SSA
V_GPIO[16]
Analog supply voltage relative to
V_SSA
Digital supply voltage relative to
V_SSD
I/O supply voltage relative to V_SSD
Direct analog core voltage input
–0.5
–
6
V
–0.5
–
6
V
–0.5
–
6
V
–0.5
–
1.95
V
Direct digital core voltage input
–0.5
–
1.95
V
Analog ground voltage
V_SSD –0.5
–
V_SSD +
V
0.5
DC input voltage on GPIO
Includes signals sourced by V_DDA V_SSD –0.5
–
V_DDIO +
V
and routed internal to the pin
0.5
V_SIO
V_IND
V_BAT
I_VDDIO
I_GPIO
I_SIO
I_USBIO
VEXTREF
LU
DC input voltage on SIO
Voltage at boost converter input
Boost converter supply
Current per V_DDIO supply pin
GPIO current
SIO current
USBIO current
ADC external reference inputs
Latch up current^[17]
Output disabled
Output enabled
Pins P0[3], P3[2]
V_SSD –0.5
–
V_SSD –0.5
–
0.5
–
V_SSD –0.5
–
–
–
–30
–
–49
–
–56
–
–
–
–140
–
7
V
6
V
5.5
V
5.5
V
100
mA
41
mA
28
mA
59
mA
2
V
140
mA
ESD_HBM
ESD_CDM
Electrostatic discharge voltage,
Human body model
Electrostatic discharge voltage,
Charge device model
V_SSA tied to V_SSD
V_SSA not tied to V_SSD
2200
–
–
V
750
–
–
V
500
–
–
V
Notes
15. Usage above the absolute maximum conditions listed in Table 11-1 may cause permanent damage to the device. Exposure to Absolute Maximum conditions for
extended periods of time may affect device reliability. The Maximum Storage Temperature is 150 °C in compliance with JEDEC Standard JESD22-A103, High
Temperature Storage Life. When used below Absolute Maximum conditions but above normal operating conditions, the device may not operate to specification.
16. The V_DDIO supply voltage must be greater than the maximum voltage on the associated GPIO pins. Maximum voltage on GPIO pin V_DDIO  V_DDA.
17. Meets or exceeds JEDEC Spec EIA/JESD78 IC Latch-up Test.
Document Number: 001-56955 Rev. *Y
Page 67 of 128