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CY8C58LP Datasheet, PDF (82/122 Pages) Cypress Semiconductor – Programmable System-on-Chip (PSoC®)
PSoC® 5LP: CY8C58LP Family
PRELIMINARY
Datasheet
Table 11-22. Delta-sigma ADC Sample Rates, Range = ±1.024 V
Resolution, Bits
8
9
10
11
12
13
14
15
16
17
18
19
20
Continuous
Min
Max
8000
384000
6400
307200
5566
267130
4741
227555
4000
192000
3283
157538
2783
133565
2371
113777
2000
48000
500
12000
125
3000
16
375
8
187.5
Multi-Sample
Min
Max
1911
91701
1543
74024
1348
64673
1154
55351
978
46900
806
38641
685
32855
585
28054
495
11861
124
2965
31
741
4
93
2
46
Multi-Sample Turbo
Min
Max
1829
87771
1489
71441
1307
62693
1123
53894
956
45850
791
37925
674
32336
577
27675
489
11725
282
6766
105
2513
15
357
8
183
Figure 11-27. Delta-sigma ADC IDD vs sps, Range = ±1.024 V,
Continuous Sample Mode, Input Buffer Bypassed
1.4
Figure 11-28. Delta-sigma ADC Noise Histogram, 1000 Sam-
ples, 20-Bit, 187 sps, Ext Ref, VIN = VREF/2, Range = ±1.024 V
1.2
1.0
0.8
16 bit
0.6
0.4
12 bit
0.2
0.0
1
10
100
Sample rate, Ksps
1000
Figure 11-29. Delta-sigma ADC Noise Histogram, 1000
Samples, 16-bit, 48 ksps, Ext Ref, VIN = VREF/2, Range =
±1.024 V
Figure 11-30. Delta-sigma ADC Noise Histogram, 1000
Samples, 16-bit, 48 ksps, Int Ref, VIN = VREF/2, Range =
±1.024 V
Document Number: 001-84932 Rev. **
Page 82 of 122