W312-02 Datasheet, PDF (8/21 Pages) Cypress Semiconductor – FTG for VIA K7 Series Chipset with Programmable Output Frequency

W312-02
Byte 5: Control Register 5
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
9
7
6
47
48
–
–
–
Name
Latched FS4 input
Latched FS3 input
Latched FS2 input
Latched FS1 input
Latched FS0 input
Reserved
Reserved
SEL4
Default
X
X
X
X
X
0
0
0
Description
Latched FS[4:0] inputs. These bits are read only.
Reserved
Reserved
SW Frequency selection bits. See Table 4.
Byte 6: Reserved Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Default
1
Reserved
1
Reserved
1
Reserved
1
Reserved
1
Reserved
1
Reserved
1
Reserved
1
Reserved
Pin Description
Byte 7: Reserved Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Default
1
1
1
1
1
1
1
1
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Pin Description
Document #: 38-07259 Rev. *B
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