PALCE16V8 Datasheet, PDF (6/13 Pages) Advanced Micro Devices – EE CMOS 20-Pin Universal Programmable Array Logic

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PALCE16V8
Commercial and Industrial Switching Characteristics (continued)^[2]
16V8-5
Parameter
Description
Min.
t_WH
Clock Width HIGH^[7]
3
t_WL
Clock Width LOW^[7]
3
f_MAX1
External Maximum
143
Frequency (1/(t_CO + t_S))^{[7, 11]}
f_MAX2
Data Path Maximum
166
Frequency (1/(t_WH + t_WL))^{[7, 12]}
f_MAX3
Internal Feedback
166
Maximum Frequency
(1/(t_CF + t_S))^{[7, 13]}
t_CF
Register Clock to
Feedback Input^{[7, 14]}
t_PR
Power-Up Reset Time^[7]
1
Max.
3
16V8-7
Min. Max.
4
4
100
125
125
3
1
16V8-10
Min. Max.
6
6
69
83
74
6
1
16V8-15
Min. Max.
8
8
45.5
62.5
50
8
1
16V8-25
Min. Max.
12
12
37
41.6
40
10
1
Unit
ns
ns
MHz
MHz
MHz
ns
µs
Military Switching Characteristics^[7]
Parameter
t_PD
t_PZX
t_PXZ
t_EA
t_ER
t_CO
t_S
t_H
t_P
t_WH
t_WL
f_MAX1
f_MAX2
f_MAX3
t_CF
t_PR
Description
Input to Output
Propagation Delay^{[8, 9]}
OE to Output Enable
OE to Output Disable
Input to Output Enable Delay^[7]
Input to Output Disable Delay^{[7, 10]}
Clock to Output Delay^{[8, 9]}
Input or Feedback Set-up Time
Input Hold Time
External Clock Period (t_CO + t_S)
Clock Width HIGH^[7]
Clock Width LOW^[7]
External Maximum Frequency
(1/(t_CO + t_S)^{[7, 11]}
Data Path Maximum Frequency
(1/(t_WH + t_WL))^{[7, 12]}
Internal Feedback Maximum
Frequency (1/(t_CF + t_S))^{[7, 13]}
Register Clock to
Feedback Input^{[7, 14]}
Power-Up Reset Time^[7]
16V8-10
Min. Max.
3
10
10
10
10
10
2
7
10
.5
17
6
6
58
83
62.5
6
1
16V8-15
Min. Max.
3
15
15
15
15
15
2
10
12
.5
22
8
8
45.5
62.5
50
8
1
16V8-25
Min. Max.
3
25
20
20
25
25
2
12
15
.5
27
12
12
37
41.6
40
10
1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
ns
µs
Document #: 38-03025 Rev. *A
Page 6 of 13