C9630 Datasheet, PDF (6/18 Pages) Cypress Semiconductor – PC133 Clock Generator for SiS630/Pentium III & SiS540/Socket7 Applications

APPROVED PRODUCT
C9630
PC133 Clock Generator for SiS630/Pentium^®III & SiS540/Socket7 Applications
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
S4 S3 S2 S1 S0 Description
Bit7 Bit2 Bit6 Bit5 Bit4 CPU SDRAM PCI Spread Spectrum, MBS0 = MBS1 = 1, SSTS = 1
0
0
0
0
0
66.6 100.0
33.3 0 to –0.5%
0
0
0
0
1
100.0 100.0
33.3 0 to –0.5%
0
0
0
1
0
150.0 100.0
37.5 +/- 0.25%
0
0
0
1
1
133.3 100.0
33.3 0 to –0.5%
0
0
1
0
0
66.8 133.6
33.4 0 to –0.5%
0
0
1
0
1
100.0 133.3
33.3 0 to –0.5%
0
0
1
1
0
100.0 150.0
37.5 +/- 0.25%
0
0
1
1
1
133.3 133.3
33.3 0 to –0.5%
0
1
0
0
0
66.8 66.8
33.4 +/- 0.25%
0
1
0
0
1
97.0 97.0
32.3 0 to –0.5%
0
1
0
1
0
70.0 105.0
35.0 +/- 0.25%
0
1
0
1
1
95.0 95.0
31.7 +/- 0.25%
0
1
1
0
0
95.0 126.7
31.7 +/- 0.25%
0
1
1
0
1
112.0 112.0
37.3 +/- 0.25%
0
1
1
1
0
97.0 129.3
32.3 0 to –0.5%
0
1
1
1
1
96.2 96.2
32.1 0 to –0.5%
1
0
0
0
0
66.8 100.2
33.4 +/- 0.25%
1
0
0
0
1
100.2 100.2
33.4 +/- 0.25%
1
0
0
1
0
166.0 110.7
33.3 +/- 0.25%
1
0
0
1
1
100.2 133.6
33.4 +/- 0.25%
1
0
1
0
0
75.0 100.0
37.5 +/- 0.25%
1
0
1
0
1
83.3 125.0
31.3 +/- 0.25%
1
0
1
1
0
105.0 140.0
35.0 +/- 0.25%
1
0
1
1
1
133.6 133.6
33.4 +/- 0.25%
1
1
0
0
0
110.3 147.0
36.8 +/- 0.25%
1
1
0
0
1
115.0 153.3
38.3 +/- 0.25%
1
1
0
1
0
120.0 120.0
30.0 +/- 0.25%
1
1
0
1
1
138.0 138.0
34.5 +/- 0.25%
1
1
1
0
0
140.0 140.0
35.0 +/- 0.25%
1
1
1
0
1
145.0 145.0
36.3 +/- 0.25%
1
1
1
1
0
147.5 147.5
29.5 +/- 0.25%
1
1
1
1
1
160.0 160.0
32 +/- 0.25%
Table 3.
TEST Function Table: Applicable only when bit0=1 in Byte0.
CPU (0:2) PCI (0:6) SDRAM (0:13) REF(0,1)
48MHz
= Xin / 3
= Xin / 6
= Xin / 2
= Xin
= Xin
Test Clock should be applied at Xin pin.
24_48MHz
= Xin / 2
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: [phone], Fax: [phone]
http://www.cypress.com
Document#: 38-07035 Rev. **
05/02/2001
Page 6 of 18