C9630 Datasheet, PDF (12/18 Pages) Cypress Semiconductor – PC133 Clock Generator for SiS630/Pentium III & SiS540/Socket7 Applications

APPROVED PRODUCT
C9630
PC133 Clock Generator for SiS630/Pentium^®III & SiS540/Socket7 Applications
DC Parameters
Characteristic
Symbol Min
Typ Max Units
Conditions
Input Low Voltage
Input High Voltage
VIL2
-
-
1.0 Vdc
VIH2
2.2
-
-
Vdc
Note 2
Input Low Current (@VIL = VSS)
IIL
Input High Current (@VIL =VDD)
IIH
66
-5
µA
For internal Pull down resistors,
5
µA
Notes 1,3
Tri-State leakage Current
Ioz
-
-
10
µA
Dynamic Supply Current
Dynamic Supply Current
Idd3.3V
-
Idd2.5V
-
-
400 mA
-
100 mA
S(3:0) = 0101, Note 4
S(3:0) = 0111, Note 4
Input pin capacitance
Cin
-
-
5
pF
Output pin capacitance
Pin inductance
Cout
-
-
6
pF
Lpin
-
-
7
nH
Crystal pin capacitance
Xin/Xout 30
32
34
pF
Measured from Pin to Ground.
Note 5
Crystal DC Bias Voltage
Crystal Startup time
V_BIAS
Txs
0.3Vdd Vdd/2 0.7Vdd V
-
-
40
µS
From Stable 3.3V power supply.
Note1:
Note2:
Note3:
Note4:
Note5:
VDD = 3.3V ±5%, VDDC = 2.5 ± 5%, TA = 0º to +70ºC
Applicable to S(0:3).
Applicable to Sdata, and Sclk.
Although internal pull-down resistors have a typical value of 250K, this value may vary between 200K and 500K.
All outputs loaded as per table 5 below.
Although the device will reliably interface with crystals of a 15pF – 20pF CL range, it is optimized to interface with a typical CL = 16pF
crystal specifications.
Clock Name
CPU, REF
PCI, SDRAM
24MHz, 48MHz
Table 5
Max Load (in pF)
20
30
15
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: [phone], Fax: [phone]
http://www.cypress.com
Document#: 38-07035 Rev. **
05/02/2001
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