C9630 Datasheet, PDF (14/18 Pages) Cypress Semiconductor – PC133 Clock Generator for SiS630/Pentium III & SiS540/Socket7 Applications

APPROVED PRODUCT
C9630
PC133 Clock Generator for SiS630/Pentium^®III & SiS540/Socket7 Applications
Note 5: This parameter is measured as an average over 1uS duration, with a crystal center frequency of 14.31818MHz
Note 6: All outputs loaded as per table 5.
Note 7: Probes are placed on the pins, and measurements are acquired between 0.4V and 2.4V for 3.3V signals and between 0.4V
and 2.0V for 2.5V signals (see Fig.9A and Fig.9B)
Note 8: Probes are placed on the pins, and measurements are acquired at 1.5V for 3.3V signals and at 1.25V for 2.5V signals. (see
Figs.9A & 9B)
Note 9: This measurement is applicable with Spread ON or Spread OFF.
Note 10:Probes are placed on the pins, and measurements are acquired at 2.4V for 3.3V signals and at 2.0V for 2.5V signals, (see
Figs. 9A & 9B)
Note 11:Probes are placed on the pins, and measurements are acquired at 0.4V.
Note 12:The time specified is measured from when all VDD’s reach their respective supply rail (3.3V and 2.5V) till the frequency
output is stable and operating within the specifications
Note 13:Measured from when both SEL1 and SEL0 are low
Note 14:Guaranteed by design in system Application (CPU frequency = SDRAM frequency)
Test and Measurement Condition
Output under Test
Probe
Load Cap
3.3V signals
tDC
-
-
3.3V
2.4V
1.5V
2.5V signals
tDC
-
-
2.0V
1.25V
2.5V
0.4V
Tr
0V
Tf
0.4V
Tr
0V
Tf
Fig. 9A
Fig. 9B
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: [phone], Fax: [phone]
http://www.cypress.com
Document#: 38-07035 Rev. **
05/02/2001
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