CG5982AF Datasheet, PDF (5/12 Pages) Cypress Semiconductor – 2K x 8 Automotive Dual-port Static RAM

CG5982AF
Switching Waveforms
Read Cycle No. 1 (Either Port-Address Access)^{[16, 17]}
t_RC
ADDRESS
t_OHA
t_AA
DATA OUT _{PREVIOUS DATA VALID}
DATA VALID
Read Cycle No. 2 (Either Port-CE/OE)^{[16, 18]}
CE
OE
t_ACE
t_LZCE
t_LZOE
DATA OUT
t_PU
I_CC
I_SB
Read Cycle No. 3 (Read with BUSY Master)
t_DOE
ADDRESS_R
R/W_R
t_RC
ADDRESS MATCH
t_PWE
t_HZOE
DATA VALID
D_INR
ADDRESS_L
BUSY_L
DOUT_L
t_PS
t_BLA
Notes:
16. R/W is HIGH for read cycle.
17. Device is continuously selected, CE = V_IL and OE = V_IL.
18. Address valid prior to or coincident with CE transition LOW.
VALID
ADDRESS MATCH
t_BHA
t_WDD
t_DDD
t_HZCE
t_PD
t_BDD
VALID
Document #: 38-06067 Rev. *C
Page 5 of 12
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