IBIS4-1300 Datasheet, PDF (30/37 Pages) Cypress Semiconductor – 1.3 MPxl Rolling Shutter CMOS Image Sensor

IBIS4-1300
No.
29
30
31
Name
clk_x
shy
dccon
32
dcref
33
gnd
34
vdd
35
sin
36
sync_y\l
37
clk_yl
38
eos_yl\
39
bitinvert
40
select
41
reset
42
d9
43
d8
44
d7
45
d6
46
d5
47
d4
48
d3
49
d2
50
d1
51
d0
52
gnd
53
vdd
54
gnd_ab
55
vdd_array
56
vdd_dig
57
gnd_dig
58
vdd_an
59
vdd_resetl
60
gnd_an
61
vhigh_adc
Type I/O
D
I
D
I
A
I
A
O
A
G
A
P
D
I
D
I
D
I
D
O
D
I
D
I
Description
Shifts on falling edge
Column parallel track and hold
control voltage for DC reference
generation
reference voltage
Column amplifier calibration signal
0 = start left shift register
clock left shift register
low 1st clk_yl pulse after last row
High active, 1 = invert bits
High active
D
I
High active
W
O
MSB
W
O
W
O
W
O
W
O
W
O
W
O
W
O
W
O
W
O
LSB
A
G
A
P
+ 5 V DC
A
G
Anti-blooming drain voltage
A
P
+ 5 V DC
D
P
+ 5 V DC
D
G
A
P
+ 5 V DC
A
P
5 V DC default
(5.5 V for large output swing)
4…4.5 V for double slope mode
A
G
A
I
+ 4 V DC
Signal
clock X shift register
1 = hold; 0 = track
Connect to GND (default)
Should be +/- 1.2 V, depends on dccon
1 = calibrate, see timing diagram
low active (0=sync)
Shifts on falling edge
Active low
inverts ADC output bits
selects row indicated by left/right shift
register
resets row indicated by left/right shift
register
ADC output
GND or +1V for improved anti-blooming
Pixel power supply
ADC digital power supply
ADC ground of digital circuits
ADC analog power supply
VDD for reset by left shift register
ADC ground of analog circuits
High ADC reference voltage
Document Number: 38-05707 Rev. *B
Page 30 of 37
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