English
Language : 

MB39C831 Datasheet, PDF (28/40 Pages) Cypress Semiconductor – Ultra Low Voltage Boost Power Management IC for Solar/Thermal Energy Harvesting Datasheet
MB39C831
11. Layout for Printed Circuit Board
Note the Points Listed Below in Layout Design
 Place the switching parts (*1) on top layer, and avoid connecting each other through through-holes.
 Make the through-holes connecting the ground plane close to the GND pins of the switching parts(*1).
 Be very careful about the current loop consisting of the output capacitor C3, the VOUT pin of IC, and the PGND2 pin. Place
and connect these parts as close as possible to make the current loop small.
 The input capacitor C1 and the inductor L1 are placed adjacent to each other.
 Place the bypass capacitor C11 close to VST pin, and make the through-holes connecting the ground plane close to the
GND pin of the bypass capacitor C11.
 Place the bypass capacitor C2 close to VCC pin, and make the through-holes connecting the ground plane close to the
GND pin of the bypass capacitor C2.
 Draw the feedback wiring pattern from the VOUT_S pin to the output capacitor C3 pin. The wiring connected to the
VOUT_S pin is very sensitive to noise so that the wiring should keep away from the switching parts(*1). Especially, be very
careful about the leaked magnetic flux from the inductor L1, even the back side of the inductor L1.
*1:
Switching parts: IC (MB39C831), Input capacitor (C1), Inductor (L1), Output capacitor (C3).
Refer to Figure 3-1.
Figure 11-1 Example of a Layout Design
VST
PGND1
VDD
VCC
C4-C8
Top Layer
R3,R2
R1,C10
Back Layer
C9
C3
C1
L1
feedback wiring pattern
through-holes
Document Number: 002-08404 Rev *A
Page 28 of 40